731 	iowrite32((desc_sw->flags & XGENE_DMA_FLAG_64B_DESC) ?  in xgene_chan_xfer_request()
842 		iowrite32(-1, ring->cmd);  in xgene_dma_cleanup_descriptors()
1287 	iowrite32(val, pdma->csr_dma + XGENE_DMA_INT);  in xgene_dma_err_isr()
1302 	iowrite32(ring->num, ring->pdma->csr_ring + XGENE_DMA_RING_STATE);  in xgene_dma_wr_ring_state()
1305 		iowrite32(ring->state[i], ring->pdma->csr_ring +  in xgene_dma_wr_ring_state()
1349 	iowrite32(XGENE_DMA_RING_ID_SETUP(ring->id),  in xgene_dma_setup_ring()
1353 	iowrite32(XGENE_DMA_RING_ID_BUF_SETUP(ring->num),  in xgene_dma_setup_ring()
1368 	iowrite32(val, ring->pdma->csr_ring + XGENE_DMA_RING_NE_INT_MODE);  in xgene_dma_setup_ring()
1380 		iowrite32(val, ring->pdma->csr_ring +  in xgene_dma_clear_ring()
1386 	iowrite32(ring_id, ring->pdma->csr_ring + XGENE_DMA_RING_ID);  in xgene_dma_clear_ring()
1388 	iowrite32(0, ring->pdma->csr_ring + XGENE_DMA_RING_ID_BUF);  in xgene_dma_clear_ring()
1543 	iowrite32(val, pdma->csr_dma + XGENE_DMA_GCR);  in xgene_dma_enable()
1552 	iowrite32(val, pdma->csr_dma + XGENE_DMA_GCR);  in xgene_dma_disable()
1561 	iowrite32(XGENE_DMA_INT_ALL_MASK,  in xgene_dma_mask_interrupts()
1563 	iowrite32(XGENE_DMA_INT_ALL_MASK,  in xgene_dma_mask_interrupts()
1565 	iowrite32(XGENE_DMA_INT_ALL_MASK,  in xgene_dma_mask_interrupts()
1567 	iowrite32(XGENE_DMA_INT_ALL_MASK,  in xgene_dma_mask_interrupts()
1569 	iowrite32(XGENE_DMA_INT_ALL_MASK,  in xgene_dma_mask_interrupts()
1573 	iowrite32(XGENE_DMA_INT_ALL_MASK, pdma->csr_dma + XGENE_DMA_INT_MASK);  in xgene_dma_mask_interrupts()
1582 	iowrite32(XGENE_DMA_INT_ALL_UNMASK,  in xgene_dma_unmask_interrupts()
1584 	iowrite32(XGENE_DMA_INT_ALL_UNMASK,  in xgene_dma_unmask_interrupts()
1586 	iowrite32(XGENE_DMA_INT_ALL_UNMASK,  in xgene_dma_unmask_interrupts()
1588 	iowrite32(XGENE_DMA_INT_ALL_UNMASK,  in xgene_dma_unmask_interrupts()
1590 	iowrite32(XGENE_DMA_INT_ALL_UNMASK,  in xgene_dma_unmask_interrupts()
1594 	iowrite32(XGENE_DMA_INT_ALL_UNMASK,  in xgene_dma_unmask_interrupts()
1603 	iowrite32(XGENE_DMA_ASSOC_RING_MNGR1,  in xgene_dma_init_hw()
1608 		iowrite32(XGENE_DMA_RAID6_MULTI_CTRL(0x1D),  in xgene_dma_init_hw()
1632 	iowrite32(0x3, pdma->csr_ring + XGENE_DMA_RING_CLKEN);  in xgene_dma_init_ring_mngr()
1633 	iowrite32(0x0, pdma->csr_ring + XGENE_DMA_RING_SRST);  in xgene_dma_init_ring_mngr()
1636 	iowrite32(0x0, pdma->csr_ring + XGENE_DMA_RING_MEM_RAM_SHUTDOWN);  in xgene_dma_init_ring_mngr()
1652 	iowrite32(XGENE_DMA_RING_THRESLD0_SET1_VAL,  in xgene_dma_init_ring_mngr()
1654 	iowrite32(XGENE_DMA_RING_THRESLD1_SET1_VAL,  in xgene_dma_init_ring_mngr()
1656 	iowrite32(XGENE_DMA_RING_HYSTERESIS_VAL,  in xgene_dma_init_ring_mngr()
1660 	iowrite32(XGENE_DMA_RING_ENABLE,  in xgene_dma_init_ring_mngr()
1675 	iowrite32(0x0, pdma->csr_dma + XGENE_DMA_MEM_RAM_SHUTDOWN);  in xgene_dma_init_mem()