275 static inline u32 vdma_ctrl_read(struct xilinx_vdma_chan *chan, u32 reg)  in vdma_ctrl_read()  function
289 	vdma_ctrl_write(chan, reg, vdma_ctrl_read(chan, reg) & ~clr);  in vdma_ctrl_clr()
295 	vdma_ctrl_write(chan, reg, vdma_ctrl_read(chan, reg) | set);  in vdma_ctrl_set()
539 	return !(vdma_ctrl_read(chan, XILINX_VDMA_REG_DMASR) &  in xilinx_vdma_is_running()
541 		(vdma_ctrl_read(chan, XILINX_VDMA_REG_DMACR) &  in xilinx_vdma_is_running()
553 	return vdma_ctrl_read(chan, XILINX_VDMA_REG_DMASR) &  in xilinx_vdma_is_idle()
569 		if (vdma_ctrl_read(chan, XILINX_VDMA_REG_DMASR) &  in xilinx_vdma_halt()
576 			chan, vdma_ctrl_read(chan, XILINX_VDMA_REG_DMASR));  in xilinx_vdma_halt()
595 		if (!(vdma_ctrl_read(chan, XILINX_VDMA_REG_DMASR) &  in xilinx_vdma_start()
602 			chan, vdma_ctrl_read(chan, XILINX_VDMA_REG_DMASR));  in xilinx_vdma_start()
658 	reg = vdma_ctrl_read(chan, XILINX_VDMA_REG_DMACR);  in xilinx_vdma_start_transfer()
778 	tmp = vdma_ctrl_read(chan, XILINX_VDMA_REG_DMACR) &  in xilinx_vdma_reset()
783 		tmp = vdma_ctrl_read(chan, XILINX_VDMA_REG_DMACR) &  in xilinx_vdma_reset()
789 			vdma_ctrl_read(chan, XILINX_VDMA_REG_DMACR),  in xilinx_vdma_reset()
790 			vdma_ctrl_read(chan, XILINX_VDMA_REG_DMASR));  in xilinx_vdma_reset()
834 	status = vdma_ctrl_read(chan, XILINX_VDMA_REG_DMASR);  in xilinx_vdma_irq_handler()
858 				vdma_ctrl_read(chan, XILINX_VDMA_REG_CURDESC),  in xilinx_vdma_irq_handler()
859 				vdma_ctrl_read(chan, XILINX_VDMA_REG_TAILDESC));  in xilinx_vdma_irq_handler()
1039 	dmacr = vdma_ctrl_read(chan, XILINX_VDMA_REG_DMACR);  in xilinx_vdma_channel_set_config()