Lines Matching refs:on

12 	depends on HAS_IOMEM
13 	depends on X86 || PPC || TILE || ARM || EDAC_SUPPORT
21 	  If this code is reporting problems on your system, please
46 	  This turns on debugging information for the entire EDAC subsystem.
52 	tristate "Decode MCEs in human-readable form (only on AMD for now)"
53 	depends on CPU_SUP_AMD && X86_MCE_AMD
57 	  occurring on your machine in human-readable form.
65 	depends on EDAC_DECODE_MCE && DEBUG_FS
78 	  memory.  EDAC can report statistics on memory error
86 	depends on ACPI_APEI_GHES && (EDAC_MM_EDAC=y)
109 	depends on EDAC_MM_EDAC && AMD_NB && EDAC_DECODE_MCE
111 	  Support for error detection and correction of DRAM ECC errors on
116 	depends on EDAC_AMD64
135 	depends on EDAC_MM_EDAC && PCI && X86_32
137 	  Support for error detection and correction on the AMD 76x
142 	depends on EDAC_MM_EDAC && PCI && X86_32
144 	  Support for error detection and correction on the Intel
149 	depends on EDAC_MM_EDAC && PCI && X86
151 	  Support for error detection and correction on the Intel
156 	depends on EDAC_MM_EDAC && PCI && X86_32
157 	depends on BROKEN
159 	  Support for error detection and correction on the Intel
164 	depends on EDAC_MM_EDAC && PCI && X86_32
166 	  Support for error detection and correction on the Intel
171 	depends on EDAC_MM_EDAC && PCI && X86
173 	  Support for error detection and correction on the Intel
178 	depends on EDAC_MM_EDAC && PCI && X86
180 	  Support for error detection and correction on the Intel
185 	depends on EDAC_MM_EDAC && PCI && X86
187 	  Support for error detection and correction on the Intel
192 	depends on EDAC_MM_EDAC && PCI && X86
194 	  Support for error detection and correction on the Intel
199 	depends on EDAC_MM_EDAC && PCI && X86
201 	  Support for error detection and correction on the Intel
206 	depends on EDAC_MM_EDAC && PCI && X86
213 	depends on EDAC_MM_EDAC && PCI && X86 && X86_MCE_INTEL
216 	  i7 Core (Nehalem) Integrated Memory Controller that exists on
222 	depends on EDAC_MM_EDAC && PCI && X86_32
224 	  Support for error detection and correction on the Intel
229 	depends on EDAC_MM_EDAC && PCI && X86_32
231 	  Support for error detection and correction on the Radisys
236 	depends on EDAC_MM_EDAC && X86 && PCI
243 	depends on EDAC_MM_EDAC && X86 && PCI
250 	depends on EDAC_MM_EDAC && X86 && PCI
257 	depends on EDAC_MM_EDAC && PCI && X86_64 && X86_MCE_INTEL
258 	depends on PCI_MMCONFIG
265 	depends on EDAC_MM_EDAC && FSL_SOC && (PPC_83xx || PPC_85xx)
267 	  Support for error detection and correction on the Freescale
272 	depends on EDAC_MM_EDAC && MV64X60
274 	  Support for error detection and correction on the Marvell
279 	depends on EDAC_MM_EDAC && PCI
280 	depends on PPC_PASEMI
282 	  Support for error detection and correction on PA Semi
287 	depends on EDAC_MM_EDAC && PPC_CELL_COMMON
289 	  Support for error detection and correction on the
291 	  on platform without a hypervisor
295 	depends on EDAC_MM_EDAC && 4xx
297 	  This enables support for EDAC on the ECC memory used
304 	depends on EDAC_MM_EDAC && PCI && PPC_MAPLE
306 	  Support for error detection and correction on the
309 	  on some machine other than Maple.
313 	depends on EDAC_MM_EDAC && PCI && PPC_MAPLE
315 	  Support for error detection and correction on the
318 	  on some machine other than Maple.
322 	depends on EDAC_MM_EDAC && PPC64
324 	  Support for error detection and correction on the
331 	depends on EDAC_MM_EDAC && TILE
334 	  Support for error detection and correction on the
339 	depends on EDAC_MM_EDAC && ARCH_HIGHBANK
341 	  Support for error detection and correction on the
346 	depends on EDAC_MM_EDAC && ARCH_HIGHBANK
348 	  Support for error detection and correction on the
353 	depends on EDAC_MM_EDAC && CPU_CAVIUM_OCTEON
355 	  Support for error detection and correction on the primary caches of
360 	depends on EDAC_MM_EDAC && CAVIUM_OCTEON_SOC
362 	  Support for error detection and correction on the
367 	depends on EDAC_MM_EDAC && CAVIUM_OCTEON_SOC
369 	  Support for error detection and correction on the
374 	depends on EDAC_MM_EDAC && PCI && CAVIUM_OCTEON_SOC
376 	  Support for error detection and correction on the
381 	depends on EDAC_MM_EDAC && ARCH_SOCFPGA
383 	  Support for error detection and correction on the
390 	depends on EDAC_MM_EDAC && ARCH_ZYNQ
392 	  Support for error detection and correction on the Synopsys DDR