Lines Matching refs:mm_gc
48 struct of_mm_gpio_chip *mm_gc; in altera_gpio_irq_unmask() local
53 mm_gc = &altera_gc->mmchip; in altera_gpio_irq_unmask()
56 intmask = readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK); in altera_gpio_irq_unmask()
59 writel(intmask, mm_gc->regs + ALTERA_GPIO_IRQ_MASK); in altera_gpio_irq_unmask()
66 struct of_mm_gpio_chip *mm_gc; in altera_gpio_irq_mask() local
71 mm_gc = &altera_gc->mmchip; in altera_gpio_irq_mask()
74 intmask = readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK); in altera_gpio_irq_mask()
77 writel(intmask, mm_gc->regs + ALTERA_GPIO_IRQ_MASK); in altera_gpio_irq_mask()
127 struct of_mm_gpio_chip *mm_gc; in altera_gpio_get() local
129 mm_gc = to_of_mm_gpio_chip(gc); in altera_gpio_get()
131 return !!(readl(mm_gc->regs + ALTERA_GPIO_DATA) & BIT(offset)); in altera_gpio_get()
136 struct of_mm_gpio_chip *mm_gc; in altera_gpio_set() local
141 mm_gc = to_of_mm_gpio_chip(gc); in altera_gpio_set()
142 chip = container_of(mm_gc, struct altera_gpio_chip, mmchip); in altera_gpio_set()
145 data_reg = readl(mm_gc->regs + ALTERA_GPIO_DATA); in altera_gpio_set()
150 writel(data_reg, mm_gc->regs + ALTERA_GPIO_DATA); in altera_gpio_set()
156 struct of_mm_gpio_chip *mm_gc; in altera_gpio_direction_input() local
161 mm_gc = to_of_mm_gpio_chip(gc); in altera_gpio_direction_input()
162 chip = container_of(mm_gc, struct altera_gpio_chip, mmchip); in altera_gpio_direction_input()
166 gpio_ddr = readl(mm_gc->regs + ALTERA_GPIO_DIR); in altera_gpio_direction_input()
168 writel(gpio_ddr, mm_gc->regs + ALTERA_GPIO_DIR); in altera_gpio_direction_input()
177 struct of_mm_gpio_chip *mm_gc; in altera_gpio_direction_output() local
182 mm_gc = to_of_mm_gpio_chip(gc); in altera_gpio_direction_output()
183 chip = container_of(mm_gc, struct altera_gpio_chip, mmchip); in altera_gpio_direction_output()
187 data_reg = readl(mm_gc->regs + ALTERA_GPIO_DATA); in altera_gpio_direction_output()
192 writel(data_reg, mm_gc->regs + ALTERA_GPIO_DATA); in altera_gpio_direction_output()
195 gpio_ddr = readl(mm_gc->regs + ALTERA_GPIO_DIR); in altera_gpio_direction_output()
197 writel(gpio_ddr, mm_gc->regs + ALTERA_GPIO_DIR); in altera_gpio_direction_output()
208 struct of_mm_gpio_chip *mm_gc; in altera_gpio_irq_edge_handler() local
215 mm_gc = &altera_gc->mmchip; in altera_gpio_irq_edge_handler()
221 (readl(mm_gc->regs + ALTERA_GPIO_EDGE_CAP) & in altera_gpio_irq_edge_handler()
222 readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK)))) { in altera_gpio_irq_edge_handler()
223 writel(status, mm_gc->regs + ALTERA_GPIO_EDGE_CAP); in altera_gpio_irq_edge_handler()
224 for_each_set_bit(i, &status, mm_gc->gc.ngpio) { in altera_gpio_irq_edge_handler()
238 struct of_mm_gpio_chip *mm_gc; in altera_gpio_irq_leveL_high_handler() local
245 mm_gc = &altera_gc->mmchip; in altera_gpio_irq_leveL_high_handler()
250 status = readl(mm_gc->regs + ALTERA_GPIO_DATA); in altera_gpio_irq_leveL_high_handler()
251 status &= readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK); in altera_gpio_irq_leveL_high_handler()
253 for_each_set_bit(i, &status, mm_gc->gc.ngpio) { in altera_gpio_irq_leveL_high_handler()