60 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm);  in mpc8xxx_gpio_save_regs()  local
62 	mpc8xxx_gc->data = in_be32(mm->regs + GPIO_DAT);  in mpc8xxx_gpio_save_regs()
74 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm);  in mpc8572_gpio_get()  local
80 	out_shadow = mpc8xxx_gc->data & out_mask;  in mpc8572_gpio_get()
95 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm);  in mpc8xxx_gpio_set()  local
98 	spin_lock_irqsave(&mpc8xxx_gc->lock, flags);  in mpc8xxx_gpio_set()
101 		mpc8xxx_gc->data |= mpc8xxx_gpio2mask(gpio);  in mpc8xxx_gpio_set()
103 		mpc8xxx_gc->data &= ~mpc8xxx_gpio2mask(gpio);  in mpc8xxx_gpio_set()
105 	out_be32(mm->regs + GPIO_DAT, mpc8xxx_gc->data);  in mpc8xxx_gpio_set()
107 	spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);  in mpc8xxx_gpio_set()
114 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm);  in mpc8xxx_gpio_set_multiple()  local
118 	spin_lock_irqsave(&mpc8xxx_gc->lock, flags);  in mpc8xxx_gpio_set_multiple()
125 				mpc8xxx_gc->data |= mpc8xxx_gpio2mask(i);  in mpc8xxx_gpio_set_multiple()
127 				mpc8xxx_gc->data &= ~mpc8xxx_gpio2mask(i);  in mpc8xxx_gpio_set_multiple()
131 	out_be32(mm->regs + GPIO_DAT, mpc8xxx_gc->data);  in mpc8xxx_gpio_set_multiple()
133 	spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);  in mpc8xxx_gpio_set_multiple()
139 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm);  in mpc8xxx_gpio_dir_in()  local
142 	spin_lock_irqsave(&mpc8xxx_gc->lock, flags);  in mpc8xxx_gpio_dir_in()
146 	spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);  in mpc8xxx_gpio_dir_in()
154 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm);  in mpc8xxx_gpio_dir_out()  local
159 	spin_lock_irqsave(&mpc8xxx_gc->lock, flags);  in mpc8xxx_gpio_dir_out()
163 	spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);  in mpc8xxx_gpio_dir_out()
180 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm);  in mpc8xxx_gpio_to_irq()  local
182 	if (mpc8xxx_gc->irq && offset < MPC8XXX_GPIO_PINS)  in mpc8xxx_gpio_to_irq()
183 		return irq_create_mapping(mpc8xxx_gc->irq, offset);  in mpc8xxx_gpio_to_irq()
190 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_desc_get_handler_data(desc);  in mpc8xxx_gpio_irq_cascade()  local
192 	struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc;  in mpc8xxx_gpio_irq_cascade()
197 		generic_handle_irq(irq_linear_revmap(mpc8xxx_gc->irq,  in mpc8xxx_gpio_irq_cascade()
205 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);  in mpc8xxx_irq_unmask()  local
206 	struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc;  in mpc8xxx_irq_unmask()
209 	spin_lock_irqsave(&mpc8xxx_gc->lock, flags);  in mpc8xxx_irq_unmask()
213 	spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);  in mpc8xxx_irq_unmask()
218 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);  in mpc8xxx_irq_mask()  local
219 	struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc;  in mpc8xxx_irq_mask()
222 	spin_lock_irqsave(&mpc8xxx_gc->lock, flags);  in mpc8xxx_irq_mask()
226 	spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);  in mpc8xxx_irq_mask()
231 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);  in mpc8xxx_irq_ack()  local
232 	struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc;  in mpc8xxx_irq_ack()
239 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);  in mpc8xxx_irq_set_type()  local
240 	struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc;  in mpc8xxx_irq_set_type()
245 		spin_lock_irqsave(&mpc8xxx_gc->lock, flags);  in mpc8xxx_irq_set_type()
248 		spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);  in mpc8xxx_irq_set_type()
252 		spin_lock_irqsave(&mpc8xxx_gc->lock, flags);  in mpc8xxx_irq_set_type()
255 		spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);  in mpc8xxx_irq_set_type()
267 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);  in mpc512x_irq_set_type()  local
268 	struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc;  in mpc512x_irq_set_type()
285 		spin_lock_irqsave(&mpc8xxx_gc->lock, flags);  in mpc512x_irq_set_type()
287 		spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);  in mpc512x_irq_set_type()
292 		spin_lock_irqsave(&mpc8xxx_gc->lock, flags);  in mpc512x_irq_set_type()
294 		spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);  in mpc512x_irq_set_type()
298 		spin_lock_irqsave(&mpc8xxx_gc->lock, flags);  in mpc512x_irq_set_type()
300 		spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);  in mpc512x_irq_set_type()
321 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = h->host_data;  in mpc8xxx_gpio_irq_map()  local
323 	if (mpc8xxx_gc->of_dev_id_data)  in mpc8xxx_gpio_irq_map()
324 		mpc8xxx_irq_chip.irq_set_type = mpc8xxx_gc->of_dev_id_data;  in mpc8xxx_gpio_irq_map()
350 	struct mpc8xxx_gpio_chip *mpc8xxx_gc;  in mpc8xxx_probe()  local
356 	mpc8xxx_gc = devm_kzalloc(&pdev->dev, sizeof(*mpc8xxx_gc), GFP_KERNEL);  in mpc8xxx_probe()
357 	if (!mpc8xxx_gc)  in mpc8xxx_probe()
360 	platform_set_drvdata(pdev, mpc8xxx_gc);  in mpc8xxx_probe()
362 	spin_lock_init(&mpc8xxx_gc->lock);  in mpc8xxx_probe()
364 	mm_gc = &mpc8xxx_gc->mm_gc;  in mpc8xxx_probe()
382 	mpc8xxx_gc->irqn = irq_of_parse_and_map(np, 0);  in mpc8xxx_probe()
383 	if (mpc8xxx_gc->irqn == NO_IRQ)  in mpc8xxx_probe()
386 	mpc8xxx_gc->irq = irq_domain_add_linear(np, MPC8XXX_GPIO_PINS,  in mpc8xxx_probe()
387 					&mpc8xxx_gpio_irq_ops, mpc8xxx_gc);  in mpc8xxx_probe()
388 	if (!mpc8xxx_gc->irq)  in mpc8xxx_probe()
393 		mpc8xxx_gc->of_dev_id_data = id->data;  in mpc8xxx_probe()
399 	irq_set_handler_data(mpc8xxx_gc->irqn, mpc8xxx_gc);  in mpc8xxx_probe()
400 	irq_set_chained_handler(mpc8xxx_gc->irqn, mpc8xxx_gpio_irq_cascade);  in mpc8xxx_probe()
407 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = platform_get_drvdata(pdev);  in mpc8xxx_remove()  local
409 	if (mpc8xxx_gc->irq) {  in mpc8xxx_remove()
410 		irq_set_handler_data(mpc8xxx_gc->irqn, NULL);  in mpc8xxx_remove()
411 		irq_set_chained_handler(mpc8xxx_gc->irqn, NULL);  in mpc8xxx_remove()
412 		irq_domain_remove(mpc8xxx_gc->irq);  in mpc8xxx_remove()
415 	of_mm_gpiochip_remove(&mpc8xxx_gc->mm_gc);  in mpc8xxx_remove()