Lines Matching refs:writel_relaxed
206 writel_relaxed(state, gpio->base_addr + reg_offset); in zynq_gpio_set_value()
234 writel_relaxed(reg, gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num)); in zynq_gpio_dir_in()
263 writel_relaxed(reg, gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num)); in zynq_gpio_dir_out()
268 writel_relaxed(reg, gpio->base_addr + ZYNQ_GPIO_OUTEN_OFFSET(bank_num)); in zynq_gpio_dir_out()
290 writel_relaxed(BIT(bank_pin_num), in zynq_gpio_irq_mask()
310 writel_relaxed(BIT(bank_pin_num), in zynq_gpio_irq_unmask()
329 writel_relaxed(BIT(bank_pin_num), in zynq_gpio_irq_ack()
418 writel_relaxed(int_type, in zynq_gpio_set_irq_type()
420 writel_relaxed(int_pol, in zynq_gpio_set_irq_type()
422 writel_relaxed(int_any, in zynq_gpio_set_irq_type()
655 writel_relaxed(ZYNQ_GPIO_IXR_DISABLE_ALL, gpio->base_addr + in zynq_gpio_probe()