531 	kfree(gma_crtc->crtc_state);  in gma_crtc_destroy()
560 	struct psb_intel_crtc_state *crtc_state = gma_crtc->crtc_state;  in gma_crtc_save()  local
565 	if (!crtc_state) {  in gma_crtc_save()
570 	crtc_state->saveDSPCNTR = REG_READ(map->cntr);  in gma_crtc_save()
571 	crtc_state->savePIPECONF = REG_READ(map->conf);  in gma_crtc_save()
572 	crtc_state->savePIPESRC = REG_READ(map->src);  in gma_crtc_save()
573 	crtc_state->saveFP0 = REG_READ(map->fp0);  in gma_crtc_save()
574 	crtc_state->saveFP1 = REG_READ(map->fp1);  in gma_crtc_save()
575 	crtc_state->saveDPLL = REG_READ(map->dpll);  in gma_crtc_save()
576 	crtc_state->saveHTOTAL = REG_READ(map->htotal);  in gma_crtc_save()
577 	crtc_state->saveHBLANK = REG_READ(map->hblank);  in gma_crtc_save()
578 	crtc_state->saveHSYNC = REG_READ(map->hsync);  in gma_crtc_save()
579 	crtc_state->saveVTOTAL = REG_READ(map->vtotal);  in gma_crtc_save()
580 	crtc_state->saveVBLANK = REG_READ(map->vblank);  in gma_crtc_save()
581 	crtc_state->saveVSYNC = REG_READ(map->vsync);  in gma_crtc_save()
582 	crtc_state->saveDSPSTRIDE = REG_READ(map->stride);  in gma_crtc_save()
585 	crtc_state->saveDSPSIZE = REG_READ(map->size);  in gma_crtc_save()
586 	crtc_state->saveDSPPOS = REG_READ(map->pos);  in gma_crtc_save()
588 	crtc_state->saveDSPBASE = REG_READ(map->base);  in gma_crtc_save()
592 		crtc_state->savePalette[i] = REG_READ(palette_reg + (i << 2));  in gma_crtc_save()
603 	struct psb_intel_crtc_state *crtc_state = gma_crtc->crtc_state;  in gma_crtc_restore()  local
608 	if (!crtc_state) {  in gma_crtc_restore()
613 	if (crtc_state->saveDPLL & DPLL_VCO_ENABLE) {  in gma_crtc_restore()
615 			crtc_state->saveDPLL & ~DPLL_VCO_ENABLE);  in gma_crtc_restore()
620 	REG_WRITE(map->fp0, crtc_state->saveFP0);  in gma_crtc_restore()
623 	REG_WRITE(map->fp1, crtc_state->saveFP1);  in gma_crtc_restore()
626 	REG_WRITE(map->dpll, crtc_state->saveDPLL);  in gma_crtc_restore()
630 	REG_WRITE(map->htotal, crtc_state->saveHTOTAL);  in gma_crtc_restore()
631 	REG_WRITE(map->hblank, crtc_state->saveHBLANK);  in gma_crtc_restore()
632 	REG_WRITE(map->hsync, crtc_state->saveHSYNC);  in gma_crtc_restore()
633 	REG_WRITE(map->vtotal, crtc_state->saveVTOTAL);  in gma_crtc_restore()
634 	REG_WRITE(map->vblank, crtc_state->saveVBLANK);  in gma_crtc_restore()
635 	REG_WRITE(map->vsync, crtc_state->saveVSYNC);  in gma_crtc_restore()
636 	REG_WRITE(map->stride, crtc_state->saveDSPSTRIDE);  in gma_crtc_restore()
638 	REG_WRITE(map->size, crtc_state->saveDSPSIZE);  in gma_crtc_restore()
639 	REG_WRITE(map->pos, crtc_state->saveDSPPOS);  in gma_crtc_restore()
641 	REG_WRITE(map->src, crtc_state->savePIPESRC);  in gma_crtc_restore()
642 	REG_WRITE(map->base, crtc_state->saveDSPBASE);  in gma_crtc_restore()
643 	REG_WRITE(map->conf, crtc_state->savePIPECONF);  in gma_crtc_restore()
647 	REG_WRITE(map->cntr, crtc_state->saveDSPCNTR);  in gma_crtc_restore()
648 	REG_WRITE(map->base, crtc_state->saveDSPBASE);  in gma_crtc_restore()
654 		REG_WRITE(palette_reg + (i << 2), crtc_state->savePalette[i]);  in gma_crtc_restore()