Lines Matching refs:I915_READ

592 				addr = I915_HI_DISPBASE(I915_READ(DSPSURF(crtc->plane)));  in i915_gem_pageflip_info()
594 addr = I915_READ(DSPADDR(crtc->plane)); in i915_gem_pageflip_info()
723 I915_READ(GEN8_MASTER_IRQ)); in i915_interrupt_info()
726 I915_READ(VLV_IER)); in i915_interrupt_info()
728 I915_READ(VLV_IIR)); in i915_interrupt_info()
730 I915_READ(VLV_IIR_RW)); in i915_interrupt_info()
732 I915_READ(VLV_IMR)); in i915_interrupt_info()
736 I915_READ(PIPESTAT(pipe))); in i915_interrupt_info()
739 I915_READ(PORT_HOTPLUG_EN)); in i915_interrupt_info()
741 I915_READ(VLV_DPFLIPSTAT)); in i915_interrupt_info()
743 I915_READ(DPINVGTT)); in i915_interrupt_info()
747 i, I915_READ(GEN8_GT_IMR(i))); in i915_interrupt_info()
749 i, I915_READ(GEN8_GT_IIR(i))); in i915_interrupt_info()
751 i, I915_READ(GEN8_GT_IER(i))); in i915_interrupt_info()
755 I915_READ(GEN8_PCU_IMR)); in i915_interrupt_info()
757 I915_READ(GEN8_PCU_IIR)); in i915_interrupt_info()
759 I915_READ(GEN8_PCU_IER)); in i915_interrupt_info()
762 I915_READ(GEN8_MASTER_IRQ)); in i915_interrupt_info()
766 i, I915_READ(GEN8_GT_IMR(i))); in i915_interrupt_info()
768 i, I915_READ(GEN8_GT_IIR(i))); in i915_interrupt_info()
770 i, I915_READ(GEN8_GT_IER(i))); in i915_interrupt_info()
782 I915_READ(GEN8_DE_PIPE_IMR(pipe))); in i915_interrupt_info()
785 I915_READ(GEN8_DE_PIPE_IIR(pipe))); in i915_interrupt_info()
788 I915_READ(GEN8_DE_PIPE_IER(pipe))); in i915_interrupt_info()
792 I915_READ(GEN8_DE_PORT_IMR)); in i915_interrupt_info()
794 I915_READ(GEN8_DE_PORT_IIR)); in i915_interrupt_info()
796 I915_READ(GEN8_DE_PORT_IER)); in i915_interrupt_info()
799 I915_READ(GEN8_DE_MISC_IMR)); in i915_interrupt_info()
801 I915_READ(GEN8_DE_MISC_IIR)); in i915_interrupt_info()
803 I915_READ(GEN8_DE_MISC_IER)); in i915_interrupt_info()
806 I915_READ(GEN8_PCU_IMR)); in i915_interrupt_info()
808 I915_READ(GEN8_PCU_IIR)); in i915_interrupt_info()
810 I915_READ(GEN8_PCU_IER)); in i915_interrupt_info()
813 I915_READ(VLV_IER)); in i915_interrupt_info()
815 I915_READ(VLV_IIR)); in i915_interrupt_info()
817 I915_READ(VLV_IIR_RW)); in i915_interrupt_info()
819 I915_READ(VLV_IMR)); in i915_interrupt_info()
823 I915_READ(PIPESTAT(pipe))); in i915_interrupt_info()
826 I915_READ(VLV_MASTER_IER)); in i915_interrupt_info()
829 I915_READ(GTIER)); in i915_interrupt_info()
831 I915_READ(GTIIR)); in i915_interrupt_info()
833 I915_READ(GTIMR)); in i915_interrupt_info()
836 I915_READ(GEN6_PMIER)); in i915_interrupt_info()
838 I915_READ(GEN6_PMIIR)); in i915_interrupt_info()
840 I915_READ(GEN6_PMIMR)); in i915_interrupt_info()
843 I915_READ(PORT_HOTPLUG_EN)); in i915_interrupt_info()
845 I915_READ(VLV_DPFLIPSTAT)); in i915_interrupt_info()
847 I915_READ(DPINVGTT)); in i915_interrupt_info()
851 I915_READ(IER)); in i915_interrupt_info()
853 I915_READ(IIR)); in i915_interrupt_info()
855 I915_READ(IMR)); in i915_interrupt_info()
859 I915_READ(PIPESTAT(pipe))); in i915_interrupt_info()
862 I915_READ(DEIER)); in i915_interrupt_info()
864 I915_READ(DEIIR)); in i915_interrupt_info()
866 I915_READ(DEIMR)); in i915_interrupt_info()
868 I915_READ(SDEIER)); in i915_interrupt_info()
870 I915_READ(SDEIIR)); in i915_interrupt_info()
872 I915_READ(SDEIMR)); in i915_interrupt_info()
874 I915_READ(GTIER)); in i915_interrupt_info()
876 I915_READ(GTIIR)); in i915_interrupt_info()
878 I915_READ(GTIMR)); in i915_interrupt_info()
1094 u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS); in i915_frequency_info()
1095 u32 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS); in i915_frequency_info()
1096 u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP); in i915_frequency_info()
1111 reqf = I915_READ(GEN6_RPNSWREQ); in i915_frequency_info()
1123 rpmodectl = I915_READ(GEN6_RP_CONTROL); in i915_frequency_info()
1124 rpinclimit = I915_READ(GEN6_RP_UP_THRESHOLD); in i915_frequency_info()
1125 rpdeclimit = I915_READ(GEN6_RP_DOWN_THRESHOLD); in i915_frequency_info()
1127 rpstat = I915_READ(GEN6_RPSTAT1); in i915_frequency_info()
1128 rpupei = I915_READ(GEN6_RP_CUR_UP_EI); in i915_frequency_info()
1129 rpcurup = I915_READ(GEN6_RP_CUR_UP); in i915_frequency_info()
1130 rpprevup = I915_READ(GEN6_RP_PREV_UP); in i915_frequency_info()
1131 rpdownei = I915_READ(GEN6_RP_CUR_DOWN_EI); in i915_frequency_info()
1132 rpcurdown = I915_READ(GEN6_RP_CUR_DOWN); in i915_frequency_info()
1133 rpprevdown = I915_READ(GEN6_RP_PREV_DOWN); in i915_frequency_info()
1146 pm_ier = I915_READ(GEN6_PMIER); in i915_frequency_info()
1147 pm_imr = I915_READ(GEN6_PMIMR); in i915_frequency_info()
1148 pm_isr = I915_READ(GEN6_PMISR); in i915_frequency_info()
1149 pm_iir = I915_READ(GEN6_PMIIR); in i915_frequency_info()
1150 pm_mask = I915_READ(GEN6_PMINTRMSK); in i915_frequency_info()
1152 pm_ier = I915_READ(GEN8_GT_IER(2)); in i915_frequency_info()
1153 pm_imr = I915_READ(GEN8_GT_IMR(2)); in i915_frequency_info()
1154 pm_isr = I915_READ(GEN8_GT_ISR(2)); in i915_frequency_info()
1155 pm_iir = I915_READ(GEN8_GT_IIR(2)); in i915_frequency_info()
1156 pm_mask = I915_READ(GEN6_PMINTRMSK); in i915_frequency_info()
1300 rgvmodectl = I915_READ(MEMMODECTL); in ironlake_drpc_info()
1301 rstdbyctl = I915_READ(RSTDBYCTL); in ironlake_drpc_info()
1383 pw_status = I915_READ(VLV_GTLC_PW_STATUS); in vlv_drpc_info()
1384 rpmodectl1 = I915_READ(GEN6_RP_CONTROL); in vlv_drpc_info()
1385 rcctl1 = I915_READ(GEN6_RC_CONTROL); in vlv_drpc_info()
1407 I915_READ(VLV_GT_RENDER_RC6)); in vlv_drpc_info()
1409 I915_READ(VLV_GT_MEDIA_RC6)); in vlv_drpc_info()
1445 rpmodectl1 = I915_READ(GEN6_RP_CONTROL); in gen6_drpc_info()
1446 rcctl1 = I915_READ(GEN6_RC_CONTROL); in gen6_drpc_info()
1496 I915_READ(GEN6_GT_GFX_RC6_LOCKED)); in gen6_drpc_info()
1498 I915_READ(GEN6_GT_GFX_RC6)); in gen6_drpc_info()
1500 I915_READ(GEN6_GT_GFX_RC6p)); in gen6_drpc_info()
1502 I915_READ(GEN6_GT_GFX_RC6pp)); in gen6_drpc_info()
1614 reg = I915_READ(ILK_DPFC_CONTROL); in i915_fbc_fc_set()
1648 if (I915_READ(IPS_CTL) & IPS_ENABLE) in i915_ips_status()
1669 sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN; in i915_sr_status()
1672 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN; in i915_sr_status()
1674 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN; in i915_sr_status()
1676 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN; in i915_sr_status()
1678 sr_enabled = I915_READ(FW_BLC_SELF_VLV) & FW_CSPWRDWNEN; in i915_sr_status()
2000 status = I915_READ(RING_EXECLIST_STATUS(ring)); in i915_execlists()
2001 ctx_id = I915_READ(RING_EXECLIST_STATUS(ring) + 4); in i915_execlists()
2005 status_pointer = I915_READ(RING_CONTEXT_STATUS_PTR(ring)); in i915_execlists()
2016 status = I915_READ(RING_CONTEXT_STATUS_BUF(ring) + 8*i); in i915_execlists()
2017 ctx_id = I915_READ(RING_CONTEXT_STATUS_BUF(ring) + 8*i + 4); in i915_execlists()
2093 I915_READ(DCC)); in i915_swizzle_info()
2095 I915_READ(DCC2)); in i915_swizzle_info()
2102 I915_READ(MAD_DIMM_C0)); in i915_swizzle_info()
2104 I915_READ(MAD_DIMM_C1)); in i915_swizzle_info()
2106 I915_READ(MAD_DIMM_C2)); in i915_swizzle_info()
2108 I915_READ(TILECTL)); in i915_swizzle_info()
2111 I915_READ(GAMTARBMODE)); in i915_swizzle_info()
2114 I915_READ(ARB_MODE)); in i915_swizzle_info()
2116 I915_READ(DISP_ARB_CTL)); in i915_swizzle_info()
2165 u64 pdp = I915_READ(ring->mmio_base + offset + 4); in gen8_ppgtt_info()
2167 pdp |= I915_READ(ring->mmio_base + offset); in gen8_ppgtt_info()
2181 seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(GFX_MODE)); in gen6_ppgtt_info()
2186 seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(RING_MODE_GEN7(ring))); in gen6_ppgtt_info()
2187 seq_printf(m, "PP_DIR_BASE: 0x%08x\n", I915_READ(RING_PP_DIR_BASE(ring))); in gen6_ppgtt_info()
2188 seq_printf(m, "PP_DIR_BASE_READ: 0x%08x\n", I915_READ(RING_PP_DIR_BASE_READ(ring))); in gen6_ppgtt_info()
2189 seq_printf(m, "PP_DIR_DCLV: 0x%08x\n", I915_READ(RING_PP_DIR_DCLV(ring))); in gen6_ppgtt_info()
2207 seq_printf(m, "ECOCHK: 0x%08x\n", I915_READ(GAM_ECOCHK)); in gen6_ppgtt_info()
2273 enabled = I915_READ(EDP_PSR_CTL(dev)) & EDP_PSR_ENABLE; in i915_edp_psr_status()
2276 stat[pipe] = I915_READ(VLV_PSRSTAT(pipe)) & in i915_edp_psr_status()
2298 psrperf = I915_READ(EDP_PSR_PERF_CNT(dev)) & in i915_edp_psr_status()
2365 power = I915_READ(MCH_SECP_NRG_STTS); in i915_energy_uJ()
2637 state = I915_READ(_CURACNTR) & CURSOR_ENABLE; in cursor_active()
2639 state = I915_READ(CURCNTR(pipe)) & CURSOR_MODE; in cursor_active()
2649 pos = I915_READ(CURPOS(pipe)); in cursor_position()
2764 I915_READ(ring->semaphore.mbox.signal[j])); in i915_semaphore_status()
2831 read = I915_READ(addr); in i915_wa_registers()
3345 uint32_t tmp = I915_READ(PORT_DFT2_G4X); in vlv_pipe_crc_ctl_reg()
3425 uint32_t tmp = I915_READ(PORT_DFT2_G4X); in i9xx_pipe_crc_ctl_reg()
3430 I915_READ(PORT_DFT_I9XX) | DC_BALANCE_RESET); in i9xx_pipe_crc_ctl_reg()
3447 uint32_t tmp = I915_READ(PORT_DFT2_G4X); in vlv_undo_pipe_scramble_reset()
3472 uint32_t tmp = I915_READ(PORT_DFT2_G4X); in g4x_undo_pipe_scramble_reset()
3482 I915_READ(PORT_DFT_I9XX) & ~DC_BALANCE_RESET); in g4x_undo_pipe_scramble_reset()
4436 snpcr = I915_READ(GEN6_MBCUNIT_SNPCR); in i915_cache_sharing_get()
4463 snpcr = I915_READ(GEN6_MBCUNIT_SNPCR); in i915_cache_sharing_set()
4510 sig1[0] = I915_READ(CHV_POWER_SS0_SIG1); in i915_sseu_status()
4511 sig1[1] = I915_READ(CHV_POWER_SS1_SIG1); in i915_sseu_status()
4512 sig2[0] = I915_READ(CHV_POWER_SS0_SIG2); in i915_sseu_status()
4513 sig2[1] = I915_READ(CHV_POWER_SS1_SIG2); in i915_sseu_status()
4537 s_reg[0] = I915_READ(GEN9_SLICE0_PGCTL_ACK); in i915_sseu_status()
4538 s_reg[1] = I915_READ(GEN9_SLICE1_PGCTL_ACK); in i915_sseu_status()
4539 s_reg[2] = I915_READ(GEN9_SLICE2_PGCTL_ACK); in i915_sseu_status()
4540 eu_reg[0] = I915_READ(GEN9_SLICE0_SS01_EU_PGCTL_ACK); in i915_sseu_status()
4541 eu_reg[1] = I915_READ(GEN9_SLICE0_SS23_EU_PGCTL_ACK); in i915_sseu_status()
4542 eu_reg[2] = I915_READ(GEN9_SLICE1_SS01_EU_PGCTL_ACK); in i915_sseu_status()
4543 eu_reg[3] = I915_READ(GEN9_SLICE1_SS23_EU_PGCTL_ACK); in i915_sseu_status()
4544 eu_reg[4] = I915_READ(GEN9_SLICE2_SS01_EU_PGCTL_ACK); in i915_sseu_status()
4545 eu_reg[5] = I915_READ(GEN9_SLICE2_SS23_EU_PGCTL_ACK); in i915_sseu_status()