542 	struct intel_crtc *crtc;  in i915_gem_pageflip_info()  local
549 	for_each_intel_crtc(dev, crtc) {  in i915_gem_pageflip_info()
550 		const char pipe = pipe_name(crtc->pipe);  in i915_gem_pageflip_info()
551 		const char plane = plane_name(crtc->plane);  in i915_gem_pageflip_info()
555 		work = crtc->unpin_work;  in i915_gem_pageflip_info()
584 				   drm_crtc_vblank_count(&crtc->base));  in i915_gem_pageflip_info()
592 				addr = I915_HI_DISPBASE(I915_READ(DSPSURF(crtc->plane)));  in i915_gem_pageflip_info()
594 				addr = I915_READ(DSPADDR(crtc->plane));  in i915_gem_pageflip_info()
2519 	struct drm_crtc *crtc = &intel_crtc->base;  in intel_encoder_info()  local
2533 			struct drm_display_mode *mode = &crtc->mode;  in intel_encoder_info()
2546 	struct drm_crtc *crtc = &intel_crtc->base;  in intel_crtc_info()  local
2549 	if (crtc->primary->fb)  in intel_crtc_info()
2551 			   crtc->primary->fb->base.id, crtc->x, crtc->y,  in intel_crtc_info()
2552 			   crtc->primary->fb->width, crtc->primary->fb->height);  in intel_crtc_info()
2555 	for_each_encoder_on_crtc(dev, crtc, intel_encoder)  in intel_crtc_info()
2667 	struct intel_crtc *crtc;  in i915_display_info()  local
2674 	for_each_intel_crtc(dev, crtc) {  in i915_display_info()
2679 			   crtc->base.base.id, pipe_name(crtc->pipe),  in i915_display_info()
2680 			   yesno(crtc->active), crtc->config->pipe_src_w,  in i915_display_info()
2681 			   crtc->config->pipe_src_h);  in i915_display_info()
2682 		if (crtc->active) {  in i915_display_info()
2683 			intel_crtc_info(m, crtc);  in i915_display_info()
2685 			active = cursor_position(dev, crtc->pipe, &x, &y);  in i915_display_info()
2687 				   yesno(crtc->cursor_base),  in i915_display_info()
2688 				   x, y, crtc->base.cursor->state->crtc_w,  in i915_display_info()
2689 				   crtc->base.cursor->state->crtc_h,  in i915_display_info()
2690 				   crtc->cursor_addr, yesno(active));  in i915_display_info()
2694 			   yesno(!crtc->cpu_fifo_underrun_disabled),  in i915_display_info()
2695 			   yesno(!crtc->pch_fifo_underrun_disabled));  in i915_display_info()
3248 	struct intel_crtc *crtc;  in i9xx_pipe_crc_auto_source()  local
3256 		if (!encoder->base.crtc)  in i9xx_pipe_crc_auto_source()
3259 		crtc = to_intel_crtc(encoder->base.crtc);  in i9xx_pipe_crc_auto_source()
3261 		if (crtc->pipe != pipe)  in i9xx_pipe_crc_auto_source()
3515 	struct intel_crtc *crtc =  in hsw_trans_edp_pipe_A_crc_wa()  local
3525 	if (crtc->config->cpu_transcoder == TRANSCODER_EDP &&  in hsw_trans_edp_pipe_A_crc_wa()
3526 	    !crtc->config->pch_pfit.enabled) {  in hsw_trans_edp_pipe_A_crc_wa()
3527 		crtc->config->pch_pfit.force_thru = true;  in hsw_trans_edp_pipe_A_crc_wa()
3532 		dev_priv->display.crtc_disable(&crtc->base);  in hsw_trans_edp_pipe_A_crc_wa()
3533 		dev_priv->display.crtc_enable(&crtc->base);  in hsw_trans_edp_pipe_A_crc_wa()
3541 	struct intel_crtc *crtc =  in hsw_undo_trans_edp_pipe_A_crc_wa()  local
3551 	if (crtc->config->pch_pfit.force_thru) {  in hsw_undo_trans_edp_pipe_A_crc_wa()
3552 		crtc->config->pch_pfit.force_thru = false;  in hsw_undo_trans_edp_pipe_A_crc_wa()
3554 		dev_priv->display.crtc_disable(&crtc->base);  in hsw_undo_trans_edp_pipe_A_crc_wa()
3555 		dev_priv->display.crtc_enable(&crtc->base);  in hsw_undo_trans_edp_pipe_A_crc_wa()
3599 	struct intel_crtc *crtc = to_intel_crtc(intel_get_crtc_for_pipe(dev,  in pipe_crc_set_source()  local
3649 		hsw_disable_ips(crtc);  in pipe_crc_set_source()
3667 		struct intel_crtc *crtc =  in pipe_crc_set_source()  local
3673 		drm_modeset_lock(&crtc->base.mutex, NULL);  in pipe_crc_set_source()
3674 		if (crtc->active)  in pipe_crc_set_source()
3676 		drm_modeset_unlock(&crtc->base.mutex);  in pipe_crc_set_source()
3694 		hsw_enable_ips(crtc);  in pipe_crc_set_source()