Lines Matching refs:m
80 static int i915_capabilities(struct seq_file *m, void *data) in i915_capabilities() argument
82 struct drm_info_node *node = m->private; in i915_capabilities()
86 seq_printf(m, "gen: %d\n", info->gen); in i915_capabilities()
87 seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(dev)); in i915_capabilities()
88 #define PRINT_FLAG(x) seq_printf(m, #x ": %s\n", yesno(info->x)) in i915_capabilities()
121 describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj) in describe_obj() argument
126 seq_printf(m, "%pK: %s%s%s %8zdKiB %02x %02x %x %x %x%s%s%s", in describe_obj()
141 seq_printf(m, " (name: %d)", obj->base.name); in describe_obj()
146 seq_printf(m, " (pinned x %d)", pin_count); in describe_obj()
148 seq_printf(m, " (display)"); in describe_obj()
150 seq_printf(m, " (fence: %d)", obj->fence_reg); in describe_obj()
153 seq_puts(m, " (pp"); in describe_obj()
155 seq_puts(m, " (g"); in describe_obj()
156 seq_printf(m, "gtt offset: %08llx, size: %08llx, type: %u)", in describe_obj()
161 seq_printf(m, " (stolen: %08llx)", obj->stolen->start); in describe_obj()
169 seq_printf(m, " (%s mappable)", s); in describe_obj()
172 seq_printf(m, " (%s)", in describe_obj()
175 seq_printf(m, " (frontbuffer: 0x%03x)", obj->frontbuffer_bits); in describe_obj()
178 static void describe_ctx(struct seq_file *m, struct intel_context *ctx) in describe_ctx() argument
180 seq_putc(m, ctx->legacy_hw_ctx.initialized ? 'I' : 'i'); in describe_ctx()
181 seq_putc(m, ctx->remap_slice ? 'R' : 'r'); in describe_ctx()
182 seq_putc(m, ' '); in describe_ctx()
185 static int i915_gem_object_list_info(struct seq_file *m, void *data) in i915_gem_object_list_info() argument
187 struct drm_info_node *node = m->private; in i915_gem_object_list_info()
204 seq_puts(m, "Active:\n"); in i915_gem_object_list_info()
208 seq_puts(m, "Inactive:\n"); in i915_gem_object_list_info()
218 seq_printf(m, " "); in i915_gem_object_list_info()
219 describe_obj(m, vma->obj); in i915_gem_object_list_info()
220 seq_printf(m, "\n"); in i915_gem_object_list_info()
227 seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n", in i915_gem_object_list_info()
243 static int i915_gem_stolen_list_info(struct seq_file *m, void *data) in i915_gem_stolen_list_info() argument
245 struct drm_info_node *node = m->private; in i915_gem_stolen_list_info()
278 seq_puts(m, "Stolen:\n"); in i915_gem_stolen_list_info()
281 seq_puts(m, " "); in i915_gem_stolen_list_info()
282 describe_obj(m, obj); in i915_gem_stolen_list_info()
283 seq_putc(m, '\n'); in i915_gem_stolen_list_info()
288 seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n", in i915_gem_stolen_list_info()
364 #define print_file_stats(m, name, stats) \ argument
365 …seq_printf(m, "%s: %u objects, %zu bytes (%zu active, %zu inactive, %zu global, %zu shared, %zu un…
375 static void print_batch_pool_stats(struct seq_file *m, in print_batch_pool_stats() argument
388 print_file_stats(m, "batch pool", stats); in print_batch_pool_stats()
402 static int i915_gem_object_info(struct seq_file *m, void* data) in i915_gem_object_info() argument
404 struct drm_info_node *node = m->private; in i915_gem_object_info()
419 seq_printf(m, "%u objects, %zu bytes\n", in i915_gem_object_info()
425 seq_printf(m, "%u [%u] objects, %zu [%zu] bytes in gtt\n", in i915_gem_object_info()
430 seq_printf(m, " %u [%u] active objects, %zu [%zu] bytes\n", in i915_gem_object_info()
435 seq_printf(m, " %u [%u] inactive objects, %zu [%zu] bytes\n", in i915_gem_object_info()
444 seq_printf(m, "%u unbound objects, %zu bytes\n", count, size); in i915_gem_object_info()
461 seq_printf(m, "%u purgeable objects, %zu bytes\n", in i915_gem_object_info()
463 seq_printf(m, "%u pinned mappable objects, %zu bytes\n", in i915_gem_object_info()
465 seq_printf(m, "%u fault mappable objects, %zu bytes\n", in i915_gem_object_info()
468 seq_printf(m, "%zu [%lu] gtt total\n", in i915_gem_object_info()
472 seq_putc(m, '\n'); in i915_gem_object_info()
473 print_batch_pool_stats(m, dev_priv); in i915_gem_object_info()
475 seq_putc(m, '\n'); in i915_gem_object_info()
493 print_file_stats(m, task ? task->comm : "<unknown>", stats); in i915_gem_object_info()
502 static int i915_gem_gtt_info(struct seq_file *m, void *data) in i915_gem_gtt_info() argument
504 struct drm_info_node *node = m->private; in i915_gem_gtt_info()
521 seq_puts(m, " "); in i915_gem_gtt_info()
522 describe_obj(m, obj); in i915_gem_gtt_info()
523 seq_putc(m, '\n'); in i915_gem_gtt_info()
531 seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n", in i915_gem_gtt_info()
537 static int i915_gem_pageflip_info(struct seq_file *m, void *data) in i915_gem_pageflip_info() argument
539 struct drm_info_node *node = m->private; in i915_gem_pageflip_info()
557 seq_printf(m, "No flip due on pipe %c (plane %c)\n", in i915_gem_pageflip_info()
563 seq_printf(m, "Flip queued on pipe %c (plane %c)\n", in i915_gem_pageflip_info()
566 seq_printf(m, "Flip pending (waiting for vsync) on pipe %c (plane %c)\n", in i915_gem_pageflip_info()
573 …seq_printf(m, "Flip queued on %s at seqno %x, next seqno %x [current breadcrumb %x], completed? %d… in i915_gem_pageflip_info()
580 seq_printf(m, "Flip not associated with any ring\n"); in i915_gem_pageflip_info()
581 seq_printf(m, "Flip queued on frame %d, (was ready on frame %d), now %d\n", in i915_gem_pageflip_info()
586 seq_puts(m, "Stall check enabled, "); in i915_gem_pageflip_info()
588 seq_puts(m, "Stall check waiting for page flip ioctl, "); in i915_gem_pageflip_info()
589 seq_printf(m, "%d prepares\n", atomic_read(&work->pending)); in i915_gem_pageflip_info()
595 seq_printf(m, "Current scanout address 0x%08x\n", addr); in i915_gem_pageflip_info()
598 seq_printf(m, "New framebuffer address 0x%08lx\n", (long)work->gtt_offset); in i915_gem_pageflip_info()
599 seq_printf(m, "MMIO update completed? %d\n", addr == work->gtt_offset); in i915_gem_pageflip_info()
610 static int i915_gem_batch_pool_info(struct seq_file *m, void *data) in i915_gem_batch_pool_info() argument
612 struct drm_info_node *node = m->private; in i915_gem_batch_pool_info()
623 seq_puts(m, "cache:\n"); in i915_gem_batch_pool_info()
627 seq_puts(m, " "); in i915_gem_batch_pool_info()
628 describe_obj(m, obj); in i915_gem_batch_pool_info()
629 seq_putc(m, '\n'); in i915_gem_batch_pool_info()
633 seq_printf(m, "total: %d\n", count); in i915_gem_batch_pool_info()
640 static int i915_gem_request_info(struct seq_file *m, void *data) in i915_gem_request_info() argument
642 struct drm_info_node *node = m->private; in i915_gem_request_info()
658 seq_printf(m, "%s requests:\n", ring->name); in i915_gem_request_info()
662 seq_printf(m, " %x @ %d\n", in i915_gem_request_info()
671 seq_puts(m, "No requests\n"); in i915_gem_request_info()
676 static void i915_ring_seqno_info(struct seq_file *m, in i915_ring_seqno_info() argument
680 seq_printf(m, "Current sequence (%s): %x\n", in i915_ring_seqno_info()
685 static int i915_gem_seqno_info(struct seq_file *m, void *data) in i915_gem_seqno_info() argument
687 struct drm_info_node *node = m->private; in i915_gem_seqno_info()
699 i915_ring_seqno_info(m, ring); in i915_gem_seqno_info()
708 static int i915_interrupt_info(struct seq_file *m, void *data) in i915_interrupt_info() argument
710 struct drm_info_node *node = m->private; in i915_interrupt_info()
722 seq_printf(m, "Master Interrupt Control:\t%08x\n", in i915_interrupt_info()
725 seq_printf(m, "Display IER:\t%08x\n", in i915_interrupt_info()
727 seq_printf(m, "Display IIR:\t%08x\n", in i915_interrupt_info()
729 seq_printf(m, "Display IIR_RW:\t%08x\n", in i915_interrupt_info()
731 seq_printf(m, "Display IMR:\t%08x\n", in i915_interrupt_info()
734 seq_printf(m, "Pipe %c stat:\t%08x\n", in i915_interrupt_info()
738 seq_printf(m, "Port hotplug:\t%08x\n", in i915_interrupt_info()
740 seq_printf(m, "DPFLIPSTAT:\t%08x\n", in i915_interrupt_info()
742 seq_printf(m, "DPINVGTT:\t%08x\n", in i915_interrupt_info()
746 seq_printf(m, "GT Interrupt IMR %d:\t%08x\n", in i915_interrupt_info()
748 seq_printf(m, "GT Interrupt IIR %d:\t%08x\n", in i915_interrupt_info()
750 seq_printf(m, "GT Interrupt IER %d:\t%08x\n", in i915_interrupt_info()
754 seq_printf(m, "PCU interrupt mask:\t%08x\n", in i915_interrupt_info()
756 seq_printf(m, "PCU interrupt identity:\t%08x\n", in i915_interrupt_info()
758 seq_printf(m, "PCU interrupt enable:\t%08x\n", in i915_interrupt_info()
761 seq_printf(m, "Master Interrupt Control:\t%08x\n", in i915_interrupt_info()
765 seq_printf(m, "GT Interrupt IMR %d:\t%08x\n", in i915_interrupt_info()
767 seq_printf(m, "GT Interrupt IIR %d:\t%08x\n", in i915_interrupt_info()
769 seq_printf(m, "GT Interrupt IER %d:\t%08x\n", in i915_interrupt_info()
776 seq_printf(m, "Pipe %c power disabled\n", in i915_interrupt_info()
780 seq_printf(m, "Pipe %c IMR:\t%08x\n", in i915_interrupt_info()
783 seq_printf(m, "Pipe %c IIR:\t%08x\n", in i915_interrupt_info()
786 seq_printf(m, "Pipe %c IER:\t%08x\n", in i915_interrupt_info()
791 seq_printf(m, "Display Engine port interrupt mask:\t%08x\n", in i915_interrupt_info()
793 seq_printf(m, "Display Engine port interrupt identity:\t%08x\n", in i915_interrupt_info()
795 seq_printf(m, "Display Engine port interrupt enable:\t%08x\n", in i915_interrupt_info()
798 seq_printf(m, "Display Engine misc interrupt mask:\t%08x\n", in i915_interrupt_info()
800 seq_printf(m, "Display Engine misc interrupt identity:\t%08x\n", in i915_interrupt_info()
802 seq_printf(m, "Display Engine misc interrupt enable:\t%08x\n", in i915_interrupt_info()
805 seq_printf(m, "PCU interrupt mask:\t%08x\n", in i915_interrupt_info()
807 seq_printf(m, "PCU interrupt identity:\t%08x\n", in i915_interrupt_info()
809 seq_printf(m, "PCU interrupt enable:\t%08x\n", in i915_interrupt_info()
812 seq_printf(m, "Display IER:\t%08x\n", in i915_interrupt_info()
814 seq_printf(m, "Display IIR:\t%08x\n", in i915_interrupt_info()
816 seq_printf(m, "Display IIR_RW:\t%08x\n", in i915_interrupt_info()
818 seq_printf(m, "Display IMR:\t%08x\n", in i915_interrupt_info()
821 seq_printf(m, "Pipe %c stat:\t%08x\n", in i915_interrupt_info()
825 seq_printf(m, "Master IER:\t%08x\n", in i915_interrupt_info()
828 seq_printf(m, "Render IER:\t%08x\n", in i915_interrupt_info()
830 seq_printf(m, "Render IIR:\t%08x\n", in i915_interrupt_info()
832 seq_printf(m, "Render IMR:\t%08x\n", in i915_interrupt_info()
835 seq_printf(m, "PM IER:\t\t%08x\n", in i915_interrupt_info()
837 seq_printf(m, "PM IIR:\t\t%08x\n", in i915_interrupt_info()
839 seq_printf(m, "PM IMR:\t\t%08x\n", in i915_interrupt_info()
842 seq_printf(m, "Port hotplug:\t%08x\n", in i915_interrupt_info()
844 seq_printf(m, "DPFLIPSTAT:\t%08x\n", in i915_interrupt_info()
846 seq_printf(m, "DPINVGTT:\t%08x\n", in i915_interrupt_info()
850 seq_printf(m, "Interrupt enable: %08x\n", in i915_interrupt_info()
852 seq_printf(m, "Interrupt identity: %08x\n", in i915_interrupt_info()
854 seq_printf(m, "Interrupt mask: %08x\n", in i915_interrupt_info()
857 seq_printf(m, "Pipe %c stat: %08x\n", in i915_interrupt_info()
861 seq_printf(m, "North Display Interrupt enable: %08x\n", in i915_interrupt_info()
863 seq_printf(m, "North Display Interrupt identity: %08x\n", in i915_interrupt_info()
865 seq_printf(m, "North Display Interrupt mask: %08x\n", in i915_interrupt_info()
867 seq_printf(m, "South Display Interrupt enable: %08x\n", in i915_interrupt_info()
869 seq_printf(m, "South Display Interrupt identity: %08x\n", in i915_interrupt_info()
871 seq_printf(m, "South Display Interrupt mask: %08x\n", in i915_interrupt_info()
873 seq_printf(m, "Graphics Interrupt enable: %08x\n", in i915_interrupt_info()
875 seq_printf(m, "Graphics Interrupt identity: %08x\n", in i915_interrupt_info()
877 seq_printf(m, "Graphics Interrupt mask: %08x\n", in i915_interrupt_info()
882 seq_printf(m, in i915_interrupt_info()
886 i915_ring_seqno_info(m, ring); in i915_interrupt_info()
894 static int i915_gem_fence_regs_info(struct seq_file *m, void *data) in i915_gem_fence_regs_info() argument
896 struct drm_info_node *node = m->private; in i915_gem_fence_regs_info()
905 seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start); in i915_gem_fence_regs_info()
906 seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs); in i915_gem_fence_regs_info()
910 seq_printf(m, "Fence %d, pin count = %d, object = ", in i915_gem_fence_regs_info()
913 seq_puts(m, "unused"); in i915_gem_fence_regs_info()
915 describe_obj(m, obj); in i915_gem_fence_regs_info()
916 seq_putc(m, '\n'); in i915_gem_fence_regs_info()
923 static int i915_hws_info(struct seq_file *m, void *data) in i915_hws_info() argument
925 struct drm_info_node *node = m->private; in i915_hws_info()
938 seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n", in i915_hws_info()
1071 static int i915_frequency_info(struct seq_file *m, void *unused) in i915_frequency_info() argument
1073 struct drm_info_node *node = m->private; in i915_frequency_info()
1086 seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf); in i915_frequency_info()
1087 seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f); in i915_frequency_info()
1088 seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >> in i915_frequency_info()
1090 seq_printf(m, "Current P-state: %d\n", in i915_frequency_info()
1158 seq_printf(m, "PM IER=0x%08x IMR=0x%08x ISR=0x%08x IIR=0x%08x, MASK=0x%08x\n", in i915_frequency_info()
1160 seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status); in i915_frequency_info()
1161 seq_printf(m, "Render p-state ratio: %d\n", in i915_frequency_info()
1163 seq_printf(m, "Render p-state VID: %d\n", in i915_frequency_info()
1165 seq_printf(m, "Render p-state limit: %d\n", in i915_frequency_info()
1167 seq_printf(m, "RPSTAT1: 0x%08x\n", rpstat); in i915_frequency_info()
1168 seq_printf(m, "RPMODECTL: 0x%08x\n", rpmodectl); in i915_frequency_info()
1169 seq_printf(m, "RPINCLIMIT: 0x%08x\n", rpinclimit); in i915_frequency_info()
1170 seq_printf(m, "RPDECLIMIT: 0x%08x\n", rpdeclimit); in i915_frequency_info()
1171 seq_printf(m, "RPNSWREQ: %dMHz\n", reqf); in i915_frequency_info()
1172 seq_printf(m, "CAGF: %dMHz\n", cagf); in i915_frequency_info()
1173 seq_printf(m, "RP CUR UP EI: %dus\n", rpupei & in i915_frequency_info()
1175 seq_printf(m, "RP CUR UP: %dus\n", rpcurup & in i915_frequency_info()
1177 seq_printf(m, "RP PREV UP: %dus\n", rpprevup & in i915_frequency_info()
1179 seq_printf(m, "RP CUR DOWN EI: %dus\n", rpdownei & in i915_frequency_info()
1181 seq_printf(m, "RP CUR DOWN: %dus\n", rpcurdown & in i915_frequency_info()
1183 seq_printf(m, "RP PREV DOWN: %dus\n", rpprevdown & in i915_frequency_info()
1188 seq_printf(m, "Lowest (RPN) frequency: %dMHz\n", in i915_frequency_info()
1193 seq_printf(m, "Nominal (RP1) frequency: %dMHz\n", in i915_frequency_info()
1198 seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n", in i915_frequency_info()
1201 seq_printf(m, "Max overclocked frequency: %dMHz\n", in i915_frequency_info()
1204 seq_printf(m, "Idle freq: %d MHz\n", in i915_frequency_info()
1211 seq_printf(m, "PUNIT_REG_GPU_FREQ_STS: 0x%08x\n", freq_sts); in i915_frequency_info()
1212 seq_printf(m, "DDR freq: %d MHz\n", dev_priv->mem_freq); in i915_frequency_info()
1214 seq_printf(m, "max GPU freq: %d MHz\n", in i915_frequency_info()
1217 seq_printf(m, "min GPU freq: %d MHz\n", in i915_frequency_info()
1220 seq_printf(m, "idle GPU freq: %d MHz\n", in i915_frequency_info()
1223 seq_printf(m, in i915_frequency_info()
1227 seq_printf(m, "current GPU freq: %d MHz\n", in i915_frequency_info()
1231 seq_puts(m, "no P-state info available\n"); in i915_frequency_info()
1239 static int i915_hangcheck_info(struct seq_file *m, void *unused) in i915_hangcheck_info() argument
1241 struct drm_info_node *node = m->private; in i915_hangcheck_info()
1250 seq_printf(m, "Hangcheck disabled\n"); in i915_hangcheck_info()
1264 seq_printf(m, "Hangcheck active, fires in %dms\n", in i915_hangcheck_info()
1268 seq_printf(m, "Hangcheck inactive\n"); in i915_hangcheck_info()
1271 seq_printf(m, "%s:\n", ring->name); in i915_hangcheck_info()
1272 seq_printf(m, "\tseqno = %x [current %x]\n", in i915_hangcheck_info()
1274 seq_printf(m, "\tACTHD = 0x%08llx [current 0x%08llx]\n", in i915_hangcheck_info()
1277 seq_printf(m, "\tmax ACTHD = 0x%08llx\n", in i915_hangcheck_info()
1279 seq_printf(m, "\tscore = %d\n", ring->hangcheck.score); in i915_hangcheck_info()
1280 seq_printf(m, "\taction = %d\n", ring->hangcheck.action); in i915_hangcheck_info()
1286 static int ironlake_drpc_info(struct seq_file *m) in ironlake_drpc_info() argument
1288 struct drm_info_node *node = m->private; in ironlake_drpc_info()
1307 seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ? in ironlake_drpc_info()
1309 seq_printf(m, "Boost freq: %d\n", in ironlake_drpc_info()
1312 seq_printf(m, "HW control enabled: %s\n", in ironlake_drpc_info()
1314 seq_printf(m, "SW control enabled: %s\n", in ironlake_drpc_info()
1316 seq_printf(m, "Gated voltage change: %s\n", in ironlake_drpc_info()
1318 seq_printf(m, "Starting frequency: P%d\n", in ironlake_drpc_info()
1320 seq_printf(m, "Max P-state: P%d\n", in ironlake_drpc_info()
1322 seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK)); in ironlake_drpc_info()
1323 seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f)); in ironlake_drpc_info()
1324 seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f)); in ironlake_drpc_info()
1325 seq_printf(m, "Render standby enabled: %s\n", in ironlake_drpc_info()
1327 seq_puts(m, "Current RS state: "); in ironlake_drpc_info()
1330 seq_puts(m, "on\n"); in ironlake_drpc_info()
1333 seq_puts(m, "RC1\n"); in ironlake_drpc_info()
1336 seq_puts(m, "RC1E\n"); in ironlake_drpc_info()
1339 seq_puts(m, "RS1\n"); in ironlake_drpc_info()
1342 seq_puts(m, "RS2 (RC6)\n"); in ironlake_drpc_info()
1345 seq_puts(m, "RC3 (RC6+)\n"); in ironlake_drpc_info()
1348 seq_puts(m, "unknown\n"); in ironlake_drpc_info()
1355 static int i915_forcewake_domains(struct seq_file *m, void *data) in i915_forcewake_domains() argument
1357 struct drm_info_node *node = m->private; in i915_forcewake_domains()
1365 seq_printf(m, "%s.wake_count = %u\n", in i915_forcewake_domains()
1374 static int vlv_drpc_info(struct seq_file *m) in vlv_drpc_info() argument
1376 struct drm_info_node *node = m->private; in vlv_drpc_info()
1389 seq_printf(m, "Video Turbo Mode: %s\n", in vlv_drpc_info()
1391 seq_printf(m, "Turbo enabled: %s\n", in vlv_drpc_info()
1393 seq_printf(m, "HW control enabled: %s\n", in vlv_drpc_info()
1395 seq_printf(m, "SW control enabled: %s\n", in vlv_drpc_info()
1398 seq_printf(m, "RC6 Enabled: %s\n", in vlv_drpc_info()
1401 seq_printf(m, "Render Power Well: %s\n", in vlv_drpc_info()
1403 seq_printf(m, "Media Power Well: %s\n", in vlv_drpc_info()
1406 seq_printf(m, "Render RC6 residency since boot: %u\n", in vlv_drpc_info()
1408 seq_printf(m, "Media RC6 residency since boot: %u\n", in vlv_drpc_info()
1411 return i915_forcewake_domains(m, NULL); in vlv_drpc_info()
1414 static int gen6_drpc_info(struct seq_file *m) in gen6_drpc_info() argument
1416 struct drm_info_node *node = m->private; in gen6_drpc_info()
1433 seq_puts(m, "RC information inaccurate because somebody " in gen6_drpc_info()
1439 seq_printf(m, "RC information accurate: %s\n", yesno(count < 51)); in gen6_drpc_info()
1454 seq_printf(m, "Video Turbo Mode: %s\n", in gen6_drpc_info()
1456 seq_printf(m, "HW control enabled: %s\n", in gen6_drpc_info()
1458 seq_printf(m, "SW control enabled: %s\n", in gen6_drpc_info()
1461 seq_printf(m, "RC1e Enabled: %s\n", in gen6_drpc_info()
1463 seq_printf(m, "RC6 Enabled: %s\n", in gen6_drpc_info()
1465 seq_printf(m, "Deep RC6 Enabled: %s\n", in gen6_drpc_info()
1467 seq_printf(m, "Deepest RC6 Enabled: %s\n", in gen6_drpc_info()
1469 seq_puts(m, "Current RC state: "); in gen6_drpc_info()
1473 seq_puts(m, "Core Power Down\n"); in gen6_drpc_info()
1475 seq_puts(m, "on\n"); in gen6_drpc_info()
1478 seq_puts(m, "RC3\n"); in gen6_drpc_info()
1481 seq_puts(m, "RC6\n"); in gen6_drpc_info()
1484 seq_puts(m, "RC7\n"); in gen6_drpc_info()
1487 seq_puts(m, "Unknown\n"); in gen6_drpc_info()
1491 seq_printf(m, "Core Power Down: %s\n", in gen6_drpc_info()
1495 seq_printf(m, "RC6 \"Locked to RPn\" residency since boot: %u\n", in gen6_drpc_info()
1497 seq_printf(m, "RC6 residency since boot: %u\n", in gen6_drpc_info()
1499 seq_printf(m, "RC6+ residency since boot: %u\n", in gen6_drpc_info()
1501 seq_printf(m, "RC6++ residency since boot: %u\n", in gen6_drpc_info()
1504 seq_printf(m, "RC6 voltage: %dmV\n", in gen6_drpc_info()
1506 seq_printf(m, "RC6+ voltage: %dmV\n", in gen6_drpc_info()
1508 seq_printf(m, "RC6++ voltage: %dmV\n", in gen6_drpc_info()
1513 static int i915_drpc_info(struct seq_file *m, void *unused) in i915_drpc_info() argument
1515 struct drm_info_node *node = m->private; in i915_drpc_info()
1519 return vlv_drpc_info(m); in i915_drpc_info()
1521 return gen6_drpc_info(m); in i915_drpc_info()
1523 return ironlake_drpc_info(m); in i915_drpc_info()
1526 static int i915_fbc_status(struct seq_file *m, void *unused) in i915_fbc_status() argument
1528 struct drm_info_node *node = m->private; in i915_fbc_status()
1533 seq_puts(m, "FBC unsupported on this chipset\n"); in i915_fbc_status()
1540 seq_puts(m, "FBC enabled\n"); in i915_fbc_status()
1542 seq_puts(m, "FBC disabled: "); in i915_fbc_status()
1545 seq_puts(m, "FBC actived, but currently disabled in hardware"); in i915_fbc_status()
1548 seq_puts(m, "unsupported by this chipset"); in i915_fbc_status()
1551 seq_puts(m, "no outputs"); in i915_fbc_status()
1554 seq_puts(m, "not enough stolen memory"); in i915_fbc_status()
1557 seq_puts(m, "mode not supported"); in i915_fbc_status()
1560 seq_puts(m, "mode too large"); in i915_fbc_status()
1563 seq_puts(m, "FBC unsupported on plane"); in i915_fbc_status()
1566 seq_puts(m, "scanout buffer not tiled"); in i915_fbc_status()
1569 seq_puts(m, "multiple pipes are enabled"); in i915_fbc_status()
1572 seq_puts(m, "disabled per module param (default off)"); in i915_fbc_status()
1575 seq_puts(m, "disabled per chip default"); in i915_fbc_status()
1578 seq_puts(m, "unknown reason"); in i915_fbc_status()
1580 seq_putc(m, '\n'); in i915_fbc_status()
1629 static int i915_ips_status(struct seq_file *m, void *unused) in i915_ips_status() argument
1631 struct drm_info_node *node = m->private; in i915_ips_status()
1636 seq_puts(m, "not supported\n"); in i915_ips_status()
1642 seq_printf(m, "Enabled by kernel parameter: %s\n", in i915_ips_status()
1646 seq_puts(m, "Currently: unknown\n"); in i915_ips_status()
1649 seq_puts(m, "Currently: enabled\n"); in i915_ips_status()
1651 seq_puts(m, "Currently: disabled\n"); in i915_ips_status()
1659 static int i915_sr_status(struct seq_file *m, void *unused) in i915_sr_status() argument
1661 struct drm_info_node *node = m->private; in i915_sr_status()
1682 seq_printf(m, "self-refresh: %s\n", in i915_sr_status()
1688 static int i915_emon_status(struct seq_file *m, void *unused) in i915_emon_status() argument
1690 struct drm_info_node *node = m->private; in i915_emon_status()
1708 seq_printf(m, "GMCH temp: %ld\n", temp); in i915_emon_status()
1709 seq_printf(m, "Chipset power: %ld\n", chipset); in i915_emon_status()
1710 seq_printf(m, "GFX power: %ld\n", gfx); in i915_emon_status()
1711 seq_printf(m, "Total power: %ld\n", chipset + gfx); in i915_emon_status()
1716 static int i915_ring_freq_table(struct seq_file *m, void *unused) in i915_ring_freq_table() argument
1718 struct drm_info_node *node = m->private; in i915_ring_freq_table()
1725 seq_puts(m, "unsupported on this chipset\n"); in i915_ring_freq_table()
1737 seq_puts(m, "GPU freq (MHz)\tEffective CPU freq (MHz)\tEffective Ring freq (MHz)\n"); in i915_ring_freq_table()
1746 seq_printf(m, "%d\t\t%d\t\t\t\t%d\n", in i915_ring_freq_table()
1759 static int i915_opregion(struct seq_file *m, void *unused) in i915_opregion() argument
1761 struct drm_info_node *node = m->private; in i915_opregion()
1777 seq_write(m, data, OPREGION_SIZE); in i915_opregion()
1787 static int i915_gem_framebuffer_info(struct seq_file *m, void *data) in i915_gem_framebuffer_info() argument
1789 struct drm_info_node *node = m->private; in i915_gem_framebuffer_info()
1800 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ", in i915_gem_framebuffer_info()
1807 describe_obj(m, fb->obj); in i915_gem_framebuffer_info()
1808 seq_putc(m, '\n'); in i915_gem_framebuffer_info()
1816 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ", in i915_gem_framebuffer_info()
1823 describe_obj(m, fb->obj); in i915_gem_framebuffer_info()
1824 seq_putc(m, '\n'); in i915_gem_framebuffer_info()
1831 static void describe_ctx_ringbuf(struct seq_file *m, in describe_ctx_ringbuf() argument
1834 seq_printf(m, " (ringbuffer, space: %d, head: %u, tail: %u, last head: %d)", in describe_ctx_ringbuf()
1839 static int i915_context_status(struct seq_file *m, void *unused) in i915_context_status() argument
1841 struct drm_info_node *node = m->private; in i915_context_status()
1857 seq_puts(m, "HW context "); in i915_context_status()
1858 describe_ctx(m, ctx); in i915_context_status()
1861 seq_printf(m, "(default context %s) ", in i915_context_status()
1866 seq_putc(m, '\n'); in i915_context_status()
1873 seq_printf(m, "%s: ", ring->name); in i915_context_status()
1875 describe_obj(m, ctx_obj); in i915_context_status()
1877 describe_ctx_ringbuf(m, ringbuf); in i915_context_status()
1878 seq_putc(m, '\n'); in i915_context_status()
1881 describe_obj(m, ctx->legacy_hw_ctx.rcs_state); in i915_context_status()
1884 seq_putc(m, '\n'); in i915_context_status()
1892 static void i915_dump_lrc_obj(struct seq_file *m, in i915_dump_lrc_obj() argument
1902 seq_printf(m, "Context on %s with no gem object\n", in i915_dump_lrc_obj()
1907 seq_printf(m, "CONTEXT: %s %u\n", ring->name, in i915_dump_lrc_obj()
1911 seq_puts(m, "\tNot bound in GGTT\n"); in i915_dump_lrc_obj()
1916 seq_puts(m, "\tFailed to get pages for context object\n"); in i915_dump_lrc_obj()
1925 seq_printf(m, "\t[0x%08lx] 0x%08x 0x%08x 0x%08x 0x%08x\n", in i915_dump_lrc_obj()
1933 seq_putc(m, '\n'); in i915_dump_lrc_obj()
1936 static int i915_dump_lrc(struct seq_file *m, void *unused) in i915_dump_lrc() argument
1938 struct drm_info_node *node = (struct drm_info_node *) m->private; in i915_dump_lrc()
1946 seq_printf(m, "Logical Ring Contexts are disabled\n"); in i915_dump_lrc()
1957 i915_dump_lrc_obj(m, ring, in i915_dump_lrc()
1967 static int i915_execlists(struct seq_file *m, void *data) in i915_execlists() argument
1969 struct drm_info_node *node = (struct drm_info_node *)m->private; in i915_execlists()
1983 seq_puts(m, "Logical Ring Contexts are disabled\n"); in i915_execlists()
1998 seq_printf(m, "%s\n", ring->name); in i915_execlists()
2002 seq_printf(m, "\tExeclist status: 0x%08X, context: %u\n", in i915_execlists()
2006 seq_printf(m, "\tStatus pointer: 0x%08X\n", status_pointer); in i915_execlists()
2012 seq_printf(m, "\tRead pointer: 0x%08X, write pointer 0x%08X\n", in i915_execlists()
2019 seq_printf(m, "\tStatus buffer %d: 0x%08X, context: %u\n", in i915_execlists()
2030 seq_printf(m, "\t%d requests in queue\n", count); in i915_execlists()
2035 seq_printf(m, "\tHead request id: %u\n", in i915_execlists()
2037 seq_printf(m, "\tHead request tail: %u\n", in i915_execlists()
2041 seq_putc(m, '\n'); in i915_execlists()
2074 static int i915_swizzle_info(struct seq_file *m, void *data) in i915_swizzle_info() argument
2076 struct drm_info_node *node = m->private; in i915_swizzle_info()
2086 seq_printf(m, "bit6 swizzle for X-tiling = %s\n", in i915_swizzle_info()
2088 seq_printf(m, "bit6 swizzle for Y-tiling = %s\n", in i915_swizzle_info()
2092 seq_printf(m, "DDC = 0x%08x\n", in i915_swizzle_info()
2094 seq_printf(m, "DDC2 = 0x%08x\n", in i915_swizzle_info()
2096 seq_printf(m, "C0DRB3 = 0x%04x\n", in i915_swizzle_info()
2098 seq_printf(m, "C1DRB3 = 0x%04x\n", in i915_swizzle_info()
2101 seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n", in i915_swizzle_info()
2103 seq_printf(m, "MAD_DIMM_C1 = 0x%08x\n", in i915_swizzle_info()
2105 seq_printf(m, "MAD_DIMM_C2 = 0x%08x\n", in i915_swizzle_info()
2107 seq_printf(m, "TILECTL = 0x%08x\n", in i915_swizzle_info()
2110 seq_printf(m, "GAMTARBMODE = 0x%08x\n", in i915_swizzle_info()
2113 seq_printf(m, "ARB_MODE = 0x%08x\n", in i915_swizzle_info()
2115 seq_printf(m, "DISP_ARB_CTL = 0x%08x\n", in i915_swizzle_info()
2120 seq_puts(m, "L-shaped memory detected\n"); in i915_swizzle_info()
2131 struct seq_file *m = data; in per_file_ctx() local
2135 seq_printf(m, " no ppgtt for context %d\n", in per_file_ctx()
2141 seq_puts(m, " default context:\n"); in per_file_ctx()
2143 seq_printf(m, " context %d:\n", ctx->user_handle); in per_file_ctx()
2144 ppgtt->debug_dump(ppgtt, m); in per_file_ctx()
2149 static void gen8_ppgtt_info(struct seq_file *m, struct drm_device *dev) in gen8_ppgtt_info() argument
2159 seq_printf(m, "Page directories: %d\n", ppgtt->num_pd_pages); in gen8_ppgtt_info()
2160 seq_printf(m, "Page tables: %d\n", ppgtt->num_pd_entries); in gen8_ppgtt_info()
2162 seq_printf(m, "%s\n", ring->name); in gen8_ppgtt_info()
2168 seq_printf(m, "\tPDP%d 0x%016llx\n", i, pdp); in gen8_ppgtt_info()
2173 static void gen6_ppgtt_info(struct seq_file *m, struct drm_device *dev) in gen6_ppgtt_info() argument
2181 seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(GFX_MODE)); in gen6_ppgtt_info()
2184 seq_printf(m, "%s\n", ring->name); in gen6_ppgtt_info()
2186 seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(RING_MODE_GEN7(ring))); in gen6_ppgtt_info()
2187 seq_printf(m, "PP_DIR_BASE: 0x%08x\n", I915_READ(RING_PP_DIR_BASE(ring))); in gen6_ppgtt_info()
2188 seq_printf(m, "PP_DIR_BASE_READ: 0x%08x\n", I915_READ(RING_PP_DIR_BASE_READ(ring))); in gen6_ppgtt_info()
2189 seq_printf(m, "PP_DIR_DCLV: 0x%08x\n", I915_READ(RING_PP_DIR_DCLV(ring))); in gen6_ppgtt_info()
2194 seq_puts(m, "aliasing PPGTT:\n"); in gen6_ppgtt_info()
2195 seq_printf(m, "pd gtt offset: 0x%08x\n", ppgtt->pd.pd_offset); in gen6_ppgtt_info()
2197 ppgtt->debug_dump(ppgtt, m); in gen6_ppgtt_info()
2203 seq_printf(m, "proc: %s\n", in gen6_ppgtt_info()
2205 idr_for_each(&file_priv->context_idr, per_file_ctx, m); in gen6_ppgtt_info()
2207 seq_printf(m, "ECOCHK: 0x%08x\n", I915_READ(GAM_ECOCHK)); in gen6_ppgtt_info()
2210 static int i915_ppgtt_info(struct seq_file *m, void *data) in i915_ppgtt_info() argument
2212 struct drm_info_node *node = m->private; in i915_ppgtt_info()
2222 gen8_ppgtt_info(m, dev); in i915_ppgtt_info()
2224 gen6_ppgtt_info(m, dev); in i915_ppgtt_info()
2232 static int i915_llc(struct seq_file *m, void *data) in i915_llc() argument
2234 struct drm_info_node *node = m->private; in i915_llc()
2239 seq_printf(m, "LLC: %s\n", yesno(HAS_LLC(dev))); in i915_llc()
2240 seq_printf(m, "eLLC: %zuMB\n", dev_priv->ellc_size); in i915_llc()
2245 static int i915_edp_psr_status(struct seq_file *m, void *data) in i915_edp_psr_status() argument
2247 struct drm_info_node *node = m->private; in i915_edp_psr_status()
2256 seq_puts(m, "PSR not supported\n"); in i915_edp_psr_status()
2263 seq_printf(m, "Sink_Support: %s\n", yesno(dev_priv->psr.sink_support)); in i915_edp_psr_status()
2264 seq_printf(m, "Source_OK: %s\n", yesno(dev_priv->psr.source_ok)); in i915_edp_psr_status()
2265 seq_printf(m, "Enabled: %s\n", yesno((bool)dev_priv->psr.enabled)); in i915_edp_psr_status()
2266 seq_printf(m, "Active: %s\n", yesno(dev_priv->psr.active)); in i915_edp_psr_status()
2267 seq_printf(m, "Busy frontbuffer bits: 0x%03x\n", in i915_edp_psr_status()
2269 seq_printf(m, "Re-enable work scheduled: %s\n", in i915_edp_psr_status()
2283 seq_printf(m, "HW Enabled & Active bit: %s", yesno(enabled)); in i915_edp_psr_status()
2289 seq_printf(m, " pipe %c", pipe_name(pipe)); in i915_edp_psr_status()
2291 seq_puts(m, "\n"); in i915_edp_psr_status()
2293 seq_printf(m, "Link standby: %s\n", in i915_edp_psr_status()
2301 seq_printf(m, "Performance_Counter: %u\n", psrperf); in i915_edp_psr_status()
2309 static int i915_sink_crc(struct seq_file *m, void *data) in i915_sink_crc() argument
2311 struct drm_info_node *node = m->private; in i915_sink_crc()
2338 seq_printf(m, "%02x%02x%02x%02x%02x%02x\n", in i915_sink_crc()
2349 static int i915_energy_uJ(struct seq_file *m, void *data) in i915_energy_uJ() argument
2351 struct drm_info_node *node = m->private; in i915_energy_uJ()
2370 seq_printf(m, "%llu", (long long unsigned)power); in i915_energy_uJ()
2375 static int i915_pc8_status(struct seq_file *m, void *unused) in i915_pc8_status() argument
2377 struct drm_info_node *node = m->private; in i915_pc8_status()
2382 seq_puts(m, "not supported\n"); in i915_pc8_status()
2386 seq_printf(m, "GPU idle: %s\n", yesno(!dev_priv->mm.busy)); in i915_pc8_status()
2387 seq_printf(m, "IRQs disabled: %s\n", in i915_pc8_status()
2460 static int i915_power_domain_info(struct seq_file *m, void *unused) in i915_power_domain_info() argument
2462 struct drm_info_node *node = m->private; in i915_power_domain_info()
2470 seq_printf(m, "%-25s %s\n", "Power well/domain", "Use count"); in i915_power_domain_info()
2476 seq_printf(m, "%-25s %d\n", power_well->name, in i915_power_domain_info()
2484 seq_printf(m, " %-23s %d\n", in i915_power_domain_info()
2495 static void intel_seq_print_mode(struct seq_file *m, int tabs, in intel_seq_print_mode() argument
2501 seq_putc(m, '\t'); in intel_seq_print_mode()
2503 …seq_printf(m, "id %d:\"%s\" freq %d clock %d hdisp %d hss %d hse %d htot %d vdisp %d vss %d vse %d… in intel_seq_print_mode()
2513 static void intel_encoder_info(struct seq_file *m, in intel_encoder_info() argument
2517 struct drm_info_node *node = m->private; in intel_encoder_info()
2524 seq_printf(m, "\tencoder %d: type: %s, connectors:\n", in intel_encoder_info()
2528 seq_printf(m, "\t\tconnector %d: type: %s, status: %s", in intel_encoder_info()
2534 seq_printf(m, ", mode:\n"); in intel_encoder_info()
2535 intel_seq_print_mode(m, 2, mode); in intel_encoder_info()
2537 seq_putc(m, '\n'); in intel_encoder_info()
2542 static void intel_crtc_info(struct seq_file *m, struct intel_crtc *intel_crtc) in intel_crtc_info() argument
2544 struct drm_info_node *node = m->private; in intel_crtc_info()
2550 seq_printf(m, "\tfb: %d, pos: %dx%d, size: %dx%d\n", in intel_crtc_info()
2554 seq_puts(m, "\tprimary plane disabled\n"); in intel_crtc_info()
2556 intel_encoder_info(m, intel_crtc, intel_encoder); in intel_crtc_info()
2559 static void intel_panel_info(struct seq_file *m, struct intel_panel *panel) in intel_panel_info() argument
2563 seq_printf(m, "\tfixed mode:\n"); in intel_panel_info()
2564 intel_seq_print_mode(m, 2, mode); in intel_panel_info()
2567 static void intel_dp_info(struct seq_file *m, in intel_dp_info() argument
2573 seq_printf(m, "\tDPCD rev: %x\n", intel_dp->dpcd[DP_DPCD_REV]); in intel_dp_info()
2574 seq_printf(m, "\taudio support: %s\n", intel_dp->has_audio ? "yes" : in intel_dp_info()
2577 intel_panel_info(m, &intel_connector->panel); in intel_dp_info()
2580 static void intel_hdmi_info(struct seq_file *m, in intel_hdmi_info() argument
2586 seq_printf(m, "\taudio support: %s\n", intel_hdmi->has_audio ? "yes" : in intel_hdmi_info()
2590 static void intel_lvds_info(struct seq_file *m, in intel_lvds_info() argument
2593 intel_panel_info(m, &intel_connector->panel); in intel_lvds_info()
2596 static void intel_connector_info(struct seq_file *m, in intel_connector_info() argument
2603 seq_printf(m, "connector %d: type %s, status: %s\n", in intel_connector_info()
2607 seq_printf(m, "\tname: %s\n", connector->display_info.name); in intel_connector_info()
2608 seq_printf(m, "\tphysical dimensions: %dx%dmm\n", in intel_connector_info()
2611 seq_printf(m, "\tsubpixel order: %s\n", in intel_connector_info()
2613 seq_printf(m, "\tCEA rev: %d\n", in intel_connector_info()
2619 intel_dp_info(m, intel_connector); in intel_connector_info()
2621 intel_hdmi_info(m, intel_connector); in intel_connector_info()
2623 intel_lvds_info(m, intel_connector); in intel_connector_info()
2626 seq_printf(m, "\tmodes:\n"); in intel_connector_info()
2628 intel_seq_print_mode(m, 2, mode); in intel_connector_info()
2662 static int i915_display_info(struct seq_file *m, void *unused) in i915_display_info() argument
2664 struct drm_info_node *node = m->private; in i915_display_info()
2672 seq_printf(m, "CRTC info\n"); in i915_display_info()
2673 seq_printf(m, "---------\n"); in i915_display_info()
2678 seq_printf(m, "CRTC %d: pipe: %c, active=%s (size=%dx%d)\n", in i915_display_info()
2683 intel_crtc_info(m, crtc); in i915_display_info()
2686 seq_printf(m, "\tcursor visible? %s, position (%d, %d), size %dx%d, addr 0x%08x, active? %s\n", in i915_display_info()
2693 seq_printf(m, "\tunderrun reporting: cpu=%s pch=%s \n", in i915_display_info()
2698 seq_printf(m, "\n"); in i915_display_info()
2699 seq_printf(m, "Connector info\n"); in i915_display_info()
2700 seq_printf(m, "--------------\n"); in i915_display_info()
2702 intel_connector_info(m, connector); in i915_display_info()
2710 static int i915_semaphore_status(struct seq_file *m, void *unused) in i915_semaphore_status() argument
2712 struct drm_info_node *node = (struct drm_info_node *) m->private; in i915_semaphore_status()
2720 seq_puts(m, "Semaphores are disabled\n"); in i915_semaphore_status()
2739 seq_printf(m, "%s\n", ring->name); in i915_semaphore_status()
2741 seq_puts(m, " Last signal:"); in i915_semaphore_status()
2744 seq_printf(m, "0x%08llx (0x%02llx) ", in i915_semaphore_status()
2747 seq_putc(m, '\n'); in i915_semaphore_status()
2749 seq_puts(m, " Last wait: "); in i915_semaphore_status()
2752 seq_printf(m, "0x%08llx (0x%02llx) ", in i915_semaphore_status()
2755 seq_putc(m, '\n'); in i915_semaphore_status()
2760 seq_puts(m, " Last signal:"); in i915_semaphore_status()
2763 seq_printf(m, "0x%08x\n", in i915_semaphore_status()
2765 seq_putc(m, '\n'); in i915_semaphore_status()
2768 seq_puts(m, "\nSync seqno:\n"); in i915_semaphore_status()
2771 seq_printf(m, " 0x%08x ", ring->semaphore.sync_seqno[j]); in i915_semaphore_status()
2773 seq_putc(m, '\n'); in i915_semaphore_status()
2775 seq_putc(m, '\n'); in i915_semaphore_status()
2782 static int i915_shared_dplls_info(struct seq_file *m, void *unused) in i915_shared_dplls_info() argument
2784 struct drm_info_node *node = (struct drm_info_node *) m->private; in i915_shared_dplls_info()
2793 seq_printf(m, "DPLL%i: %s, id: %i\n", i, pll->name, pll->id); in i915_shared_dplls_info()
2794 seq_printf(m, " crtc_mask: 0x%08x, active: %d, on: %s\n", in i915_shared_dplls_info()
2796 seq_printf(m, " tracked hardware state:\n"); in i915_shared_dplls_info()
2797 seq_printf(m, " dpll: 0x%08x\n", pll->config.hw_state.dpll); in i915_shared_dplls_info()
2798 seq_printf(m, " dpll_md: 0x%08x\n", in i915_shared_dplls_info()
2800 seq_printf(m, " fp0: 0x%08x\n", pll->config.hw_state.fp0); in i915_shared_dplls_info()
2801 seq_printf(m, " fp1: 0x%08x\n", pll->config.hw_state.fp1); in i915_shared_dplls_info()
2802 seq_printf(m, " wrpll: 0x%08x\n", pll->config.hw_state.wrpll); in i915_shared_dplls_info()
2809 static int i915_wa_registers(struct seq_file *m, void *unused) in i915_wa_registers() argument
2813 struct drm_info_node *node = (struct drm_info_node *) m->private; in i915_wa_registers()
2823 seq_printf(m, "Workarounds applied: %d\n", dev_priv->workarounds.count); in i915_wa_registers()
2833 seq_printf(m, "0x%X: 0x%08X, mask: 0x%08X, read: 0x%08x, status: %s\n", in i915_wa_registers()
2843 static int i915_ddb_info(struct seq_file *m, void *unused) in i915_ddb_info() argument
2845 struct drm_info_node *node = m->private; in i915_ddb_info()
2860 seq_printf(m, "%-15s%8s%8s%8s\n", "", "Start", "End", "Size"); in i915_ddb_info()
2863 seq_printf(m, "Pipe %c\n", pipe_name(pipe)); in i915_ddb_info()
2867 seq_printf(m, " Plane%-8d%8u%8u%8u\n", plane + 1, in i915_ddb_info()
2873 seq_printf(m, " %-13s%8u%8u%8u\n", "Cursor", entry->start, in i915_ddb_info()
2882 static void drrs_status_per_crtc(struct seq_file *m, in drrs_status_per_crtc() argument
2894 seq_puts(m, "eDP:\n"); in drrs_status_per_crtc()
2897 seq_puts(m, "DSI:\n"); in drrs_status_per_crtc()
2900 seq_puts(m, "HDMI:\n"); in drrs_status_per_crtc()
2903 seq_puts(m, "DP:\n"); in drrs_status_per_crtc()
2906 seq_printf(m, "Other encoder (id=%d).\n", in drrs_status_per_crtc()
2913 seq_puts(m, "\tVBT: DRRS_type: Static"); in drrs_status_per_crtc()
2915 seq_puts(m, "\tVBT: DRRS_type: Seamless"); in drrs_status_per_crtc()
2917 seq_puts(m, "\tVBT: DRRS_type: None"); in drrs_status_per_crtc()
2919 seq_puts(m, "\tVBT: DRRS_type: FIXME: Unrecognized Value"); in drrs_status_per_crtc()
2921 seq_puts(m, "\n\n"); in drrs_status_per_crtc()
2928 seq_puts(m, "\tDRRS Supported: Yes\n"); in drrs_status_per_crtc()
2932 seq_puts(m, "Idleness DRRS: Disabled"); in drrs_status_per_crtc()
2938 seq_printf(m, "\t\tBusy_frontbuffer_bits: 0x%X", in drrs_status_per_crtc()
2941 seq_puts(m, "\n\t\t"); in drrs_status_per_crtc()
2943 seq_puts(m, "DRRS_State: DRRS_HIGH_RR\n"); in drrs_status_per_crtc()
2946 seq_puts(m, "DRRS_State: DRRS_LOW_RR\n"); in drrs_status_per_crtc()
2949 seq_printf(m, "DRRS_State: Unknown(%d)\n", in drrs_status_per_crtc()
2954 seq_printf(m, "\t\tVrefresh: %d", vrefresh); in drrs_status_per_crtc()
2956 seq_puts(m, "\n\t\t"); in drrs_status_per_crtc()
2960 seq_puts(m, "\tDRRS Supported : No"); in drrs_status_per_crtc()
2962 seq_puts(m, "\n"); in drrs_status_per_crtc()
2965 static int i915_drrs_status(struct seq_file *m, void *unused) in i915_drrs_status() argument
2967 struct drm_info_node *node = m->private; in i915_drrs_status()
2977 seq_printf(m, "\nCRTC %d: ", active_crtc_cnt); in i915_drrs_status()
2979 drrs_status_per_crtc(m, dev, intel_crtc); in i915_drrs_status()
2986 seq_puts(m, "No active crtc found\n"); in i915_drrs_status()
2997 static int i915_dp_mst_info(struct seq_file *m, void *unused) in i915_dp_mst_info() argument
2999 struct drm_info_node *node = (struct drm_info_node *) m->private; in i915_dp_mst_info()
3013 drm_dp_mst_dump_topology(m, &intel_dig_port->dp.mst_mgr); in i915_dp_mst_info()
3204 static int display_crc_ctl_show(struct seq_file *m, void *data) in display_crc_ctl_show() argument
3206 struct drm_device *dev = m->private; in display_crc_ctl_show()
3211 seq_printf(m, "%c %s\n", pipe_name(i), in display_crc_ctl_show()
3828 struct seq_file *m = file->private_data; in display_crc_ctl_write() local
3829 struct drm_device *dev = m->private; in display_crc_ctl_write()
3872 static void wm_latency_show(struct seq_file *m, const uint16_t wm[8]) in wm_latency_show() argument
3874 struct drm_device *dev = m->private; in wm_latency_show()
3892 seq_printf(m, "WM%d %u (%u.%u usec)\n", in wm_latency_show()
3899 static int pri_wm_latency_show(struct seq_file *m, void *data) in pri_wm_latency_show() argument
3901 struct drm_device *dev = m->private; in pri_wm_latency_show()
3910 wm_latency_show(m, latencies); in pri_wm_latency_show()
3915 static int spr_wm_latency_show(struct seq_file *m, void *data) in spr_wm_latency_show() argument
3917 struct drm_device *dev = m->private; in spr_wm_latency_show()
3926 wm_latency_show(m, latencies); in spr_wm_latency_show()
3931 static int cur_wm_latency_show(struct seq_file *m, void *data) in cur_wm_latency_show() argument
3933 struct drm_device *dev = m->private; in cur_wm_latency_show()
3942 wm_latency_show(m, latencies); in cur_wm_latency_show()
3980 struct seq_file *m = file->private_data; in wm_latency_write() local
3981 struct drm_device *dev = m->private; in wm_latency_write()
4016 struct seq_file *m = file->private_data; in pri_wm_latency_write() local
4017 struct drm_device *dev = m->private; in pri_wm_latency_write()
4032 struct seq_file *m = file->private_data; in spr_wm_latency_write() local
4033 struct drm_device *dev = m->private; in spr_wm_latency_write()
4048 struct seq_file *m = file->private_data; in cur_wm_latency_write() local
4049 struct drm_device *dev = m->private; in cur_wm_latency_write()
4476 static int i915_sseu_status(struct seq_file *m, void *unused) in i915_sseu_status() argument
4478 struct drm_info_node *node = (struct drm_info_node *) m->private; in i915_sseu_status()
4486 seq_puts(m, "SSEU Device Info\n"); in i915_sseu_status()
4487 seq_printf(m, " Available Slice Total: %u\n", in i915_sseu_status()
4489 seq_printf(m, " Available Subslice Total: %u\n", in i915_sseu_status()
4491 seq_printf(m, " Available Subslice Per Slice: %u\n", in i915_sseu_status()
4493 seq_printf(m, " Available EU Total: %u\n", in i915_sseu_status()
4495 seq_printf(m, " Available EU Per Subslice: %u\n", in i915_sseu_status()
4497 seq_printf(m, " Has Slice Power Gating: %s\n", in i915_sseu_status()
4499 seq_printf(m, " Has Subslice Power Gating: %s\n", in i915_sseu_status()
4501 seq_printf(m, " Has EU Power Gating: %s\n", in i915_sseu_status()
4504 seq_puts(m, "SSEU Device Status\n"); in i915_sseu_status()
4573 seq_printf(m, " Enabled Slice Total: %u\n", s_tot); in i915_sseu_status()
4574 seq_printf(m, " Enabled Subslice Total: %u\n", ss_tot); in i915_sseu_status()
4575 seq_printf(m, " Enabled Subslice Per Slice: %u\n", ss_per); in i915_sseu_status()
4576 seq_printf(m, " Enabled EU Total: %u\n", eu_tot); in i915_sseu_status()
4577 seq_printf(m, " Enabled EU Per Subslice: %u\n", eu_per); in i915_sseu_status()