212 	dev_priv->bridge_dev = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));  in i915_get_bridge_dev()
213 	if (!dev_priv->bridge_dev) {  in i915_get_bridge_dev()
238 		pci_read_config_dword(dev_priv->bridge_dev, reg + 4, &temp_hi);  in intel_alloc_mchbar_resource()
239 	pci_read_config_dword(dev_priv->bridge_dev, reg, &temp_lo);  in intel_alloc_mchbar_resource()
252 	ret = pci_bus_alloc_resource(dev_priv->bridge_dev->bus,  in intel_alloc_mchbar_resource()
257 				     dev_priv->bridge_dev);  in intel_alloc_mchbar_resource()
265 		pci_write_config_dword(dev_priv->bridge_dev, reg + 4,  in intel_alloc_mchbar_resource()
268 	pci_write_config_dword(dev_priv->bridge_dev, reg,  in intel_alloc_mchbar_resource()
288 		pci_read_config_dword(dev_priv->bridge_dev, DEVEN_REG, &temp);  in intel_setup_mchbar()
291 		pci_read_config_dword(dev_priv->bridge_dev, mchbar_reg, &temp);  in intel_setup_mchbar()
306 		pci_write_config_dword(dev_priv->bridge_dev, DEVEN_REG,  in intel_setup_mchbar()
309 		pci_read_config_dword(dev_priv->bridge_dev, mchbar_reg, &temp);  in intel_setup_mchbar()
310 		pci_write_config_dword(dev_priv->bridge_dev, mchbar_reg, temp | 1);  in intel_setup_mchbar()
323 			pci_read_config_dword(dev_priv->bridge_dev, DEVEN_REG, &temp);  in intel_teardown_mchbar()
325 			pci_write_config_dword(dev_priv->bridge_dev, DEVEN_REG, temp);  in intel_teardown_mchbar()
327 			pci_read_config_dword(dev_priv->bridge_dev, mchbar_reg, &temp);  in intel_teardown_mchbar()
329 			pci_write_config_dword(dev_priv->bridge_dev, mchbar_reg, temp);  in intel_teardown_mchbar()
1007 	pci_dev_put(dev_priv->bridge_dev);  in i915_driver_load()
1097 	pci_dev_put(dev_priv->bridge_dev);  in i915_driver_unload()