Lines Matching refs:MI_INSTR
242 #define MI_INSTR(opcode, flags) (((opcode) << 23) | (flags)) macro
246 #define MI_NOOP MI_INSTR(0, 0)
247 #define MI_USER_INTERRUPT MI_INSTR(0x02, 0)
248 #define MI_WAIT_FOR_EVENT MI_INSTR(0x03, 0)
253 #define MI_FLUSH MI_INSTR(0x04, 0)
260 #define MI_REPORT_HEAD MI_INSTR(0x07, 0)
261 #define MI_ARB_ON_OFF MI_INSTR(0x08, 0)
264 #define MI_BATCH_BUFFER_END MI_INSTR(0x0a, 0)
265 #define MI_SUSPEND_FLUSH MI_INSTR(0x0b, 0)
267 #define MI_SET_APPID MI_INSTR(0x0e, 0)
268 #define MI_OVERLAY_FLIP MI_INSTR(0x11, 0)
272 #define MI_LOAD_SCAN_LINES_INCL MI_INSTR(0x12, 0)
273 #define MI_DISPLAY_FLIP MI_INSTR(0x14, 2)
274 #define MI_DISPLAY_FLIP_I915 MI_INSTR(0x14, 1)
293 #define MI_SEMAPHORE_MBOX MI_INSTR(0x16, 1) /* gen6, gen7 */
312 #define MI_SET_CONTEXT MI_INSTR(0x18, 0)
319 #define MI_SEMAPHORE_SIGNAL MI_INSTR(0x1b, 0) /* GEN8+ */
321 #define MI_SEMAPHORE_WAIT MI_INSTR(0x1c, 2) /* GEN8+ */
324 #define MI_STORE_DWORD_IMM MI_INSTR(0x20, 1)
325 #define MI_STORE_DWORD_IMM_GEN4 MI_INSTR(0x20, 2)
328 #define MI_STORE_DWORD_INDEX MI_INSTR(0x21, 1)
336 #define MI_LOAD_REGISTER_IMM(x) MI_INSTR(0x22, 2*(x)-1)
338 #define MI_STORE_REGISTER_MEM(x) MI_INSTR(0x24, 2*(x)-1)
339 #define MI_STORE_REGISTER_MEM_GEN8(x) MI_INSTR(0x24, 3*(x)-1)
341 #define MI_FLUSH_DW MI_INSTR(0x26, 1) /* for GEN6 */
350 #define MI_BATCH_BUFFER MI_INSTR(0x30, 1)
356 #define MI_BATCH_BUFFER_START MI_INSTR(0x31, 0)
358 #define MI_BATCH_BUFFER_START_GEN8 MI_INSTR(0x31, 1)
439 #define MI_SET_PREDICATE MI_INSTR(0x01, 0)
440 #define MI_ARB_CHECK MI_INSTR(0x05, 0)
441 #define MI_RS_CONTROL MI_INSTR(0x06, 0)
442 #define MI_URB_ATOMIC_ALLOC MI_INSTR(0x09, 0)
443 #define MI_PREDICATE MI_INSTR(0x0C, 0)
444 #define MI_RS_CONTEXT MI_INSTR(0x0F, 0)
445 #define MI_TOPOLOGY_FILTER MI_INSTR(0x0D, 0)
446 #define MI_LOAD_SCAN_LINES_EXCL MI_INSTR(0x13, 0)
447 #define MI_URB_CLEAR MI_INSTR(0x19, 0)
448 #define MI_UPDATE_GTT MI_INSTR(0x23, 0)
449 #define MI_CLFLUSH MI_INSTR(0x27, 0)
450 #define MI_REPORT_PERF_COUNT MI_INSTR(0x28, 0)
452 #define MI_LOAD_REGISTER_MEM MI_INSTR(0x29, 0)
453 #define MI_LOAD_REGISTER_REG MI_INSTR(0x2A, 0)
454 #define MI_RS_STORE_DATA_IMM MI_INSTR(0x2B, 0)
455 #define MI_LOAD_URB_MEM MI_INSTR(0x2C, 0)
456 #define MI_STORE_URB_MEM MI_INSTR(0x2D, 0)
457 #define MI_CONDITIONAL_BATCH_BUFFER_END MI_INSTR(0x36, 0)