71 		I915_WRITE(DSPARB, dev_priv->regfile.saveDSPARB);  in i915_restore_display()
77 		I915_WRITE(PCH_LVDS, dev_priv->regfile.saveLVDS & mask);  in i915_restore_display()
79 		I915_WRITE(LVDS, dev_priv->regfile.saveLVDS & mask);  in i915_restore_display()
83 		I915_WRITE(PCH_PP_ON_DELAYS, dev_priv->regfile.savePP_ON_DELAYS);  in i915_restore_display()
84 		I915_WRITE(PCH_PP_OFF_DELAYS, dev_priv->regfile.savePP_OFF_DELAYS);  in i915_restore_display()
85 		I915_WRITE(PCH_PP_DIVISOR, dev_priv->regfile.savePP_DIVISOR);  in i915_restore_display()
86 		I915_WRITE(PCH_PP_CONTROL, dev_priv->regfile.savePP_CONTROL);  in i915_restore_display()
88 		I915_WRITE(PP_ON_DELAYS, dev_priv->regfile.savePP_ON_DELAYS);  in i915_restore_display()
89 		I915_WRITE(PP_OFF_DELAYS, dev_priv->regfile.savePP_OFF_DELAYS);  in i915_restore_display()
90 		I915_WRITE(PP_DIVISOR, dev_priv->regfile.savePP_DIVISOR);  in i915_restore_display()
91 		I915_WRITE(PP_CONTROL, dev_priv->regfile.savePP_CONTROL);  in i915_restore_display()
99 		I915_WRITE(FBC_CONTROL, dev_priv->regfile.saveFBC_CONTROL);  in i915_restore_display()
153 		I915_WRITE(CACHE_MODE_0, dev_priv->regfile.saveCACHE_MODE_0 |  in i915_restore_state()
157 	I915_WRITE(MI_ARB_STATE, dev_priv->regfile.saveMI_ARB_STATE | 0xffff0000);  in i915_restore_state()
160 		I915_WRITE(SWF00 + (i << 2), dev_priv->regfile.saveSWF0[i]);  in i915_restore_state()
161 		I915_WRITE(SWF10 + (i << 2), dev_priv->regfile.saveSWF1[i]);  in i915_restore_state()
164 		I915_WRITE(SWF30 + (i << 2), dev_priv->regfile.saveSWF2[i]);  in i915_restore_state()