217 	DRM_DEBUG_KMS("Disabling SPLL\n");  in hsw_crt_post_disable()
317 			DRM_DEBUG_KMS("LPT only supports 24bpp\n");  in intel_crt_compute_config()
349 		DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);  in intel_ironlake_crt_detect_hotplug()
359 			DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");  in intel_ironlake_crt_detect_hotplug()
373 	DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);  in intel_ironlake_crt_detect_hotplug()
388 	DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);  in valleyview_crt_detect_hotplug()
396 		DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");  in valleyview_crt_detect_hotplug()
407 	DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);  in valleyview_crt_detect_hotplug()
453 			DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");  in intel_crt_detect_hotplug()
477 		DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");  in intel_crt_get_edid()
524 			DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");  in intel_crt_detect_ddc()
528 		DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");  in intel_crt_detect_ddc()
530 		DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");  in intel_crt_detect_ddc()
559 	DRM_DEBUG_KMS("starting load-detect on CRT\n");  in intel_crt_load_detect()
670 	DRM_DEBUG_KMS("[CONNECTOR:%d:%s] force=%d\n",  in intel_crt_detect()
683 			DRM_DEBUG_KMS("CRT detected via hotplug\n");  in intel_crt_detect()
687 			DRM_DEBUG_KMS("CRT not detected via hotplug\n");  in intel_crt_detect()
787 		DRM_DEBUG_KMS("crt adpa set to 0x%x\n", adpa);  in intel_crt_reset()