162 	u32 adpa;  in intel_crt_set_dpms()  local
165 		adpa = ADPA_HOTPLUG_BITS;  in intel_crt_set_dpms()
167 		adpa = 0;  in intel_crt_set_dpms()
170 		adpa |= ADPA_HSYNC_ACTIVE_HIGH;  in intel_crt_set_dpms()
172 		adpa |= ADPA_VSYNC_ACTIVE_HIGH;  in intel_crt_set_dpms()
178 		adpa |= PORT_TRANS_SEL_CPT(crtc->pipe);  in intel_crt_set_dpms()
180 		adpa |= ADPA_PIPE_A_SELECT;  in intel_crt_set_dpms()
182 		adpa |= ADPA_PIPE_B_SELECT;  in intel_crt_set_dpms()
189 		adpa |= ADPA_DAC_ENABLE;  in intel_crt_set_dpms()
192 		adpa |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;  in intel_crt_set_dpms()
195 		adpa |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;  in intel_crt_set_dpms()
198 		adpa |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;  in intel_crt_set_dpms()
202 	I915_WRITE(crt->adpa_reg, adpa);  in intel_crt_set_dpms()
338 	u32 adpa;  in intel_ironlake_crt_detect_hotplug()  local
348 		save_adpa = adpa = I915_READ(crt->adpa_reg);  in intel_ironlake_crt_detect_hotplug()
349 		DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);  in intel_ironlake_crt_detect_hotplug()
351 		adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;  in intel_ironlake_crt_detect_hotplug()
353 			adpa &= ~ADPA_DAC_ENABLE;  in intel_ironlake_crt_detect_hotplug()
355 		I915_WRITE(crt->adpa_reg, adpa);  in intel_ironlake_crt_detect_hotplug()
368 	adpa = I915_READ(crt->adpa_reg);  in intel_ironlake_crt_detect_hotplug()
369 	if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)  in intel_ironlake_crt_detect_hotplug()
373 	DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);  in intel_ironlake_crt_detect_hotplug()
383 	u32 adpa;  in valleyview_crt_detect_hotplug()  local
387 	save_adpa = adpa = I915_READ(crt->adpa_reg);  in valleyview_crt_detect_hotplug()
388 	DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);  in valleyview_crt_detect_hotplug()
390 	adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;  in valleyview_crt_detect_hotplug()
392 	I915_WRITE(crt->adpa_reg, adpa);  in valleyview_crt_detect_hotplug()
401 	adpa = I915_READ(crt->adpa_reg);  in valleyview_crt_detect_hotplug()
402 	if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)  in valleyview_crt_detect_hotplug()
407 	DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);  in valleyview_crt_detect_hotplug()
779 		u32 adpa;  in intel_crt_reset()  local
781 		adpa = I915_READ(crt->adpa_reg);  in intel_crt_reset()
782 		adpa &= ~ADPA_CRT_HOTPLUG_MASK;  in intel_crt_reset()
783 		adpa |= ADPA_HOTPLUG_BITS;  in intel_crt_reset()
784 		I915_WRITE(crt->adpa_reg, adpa);  in intel_crt_reset()
787 		DRM_DEBUG_KMS("crt adpa set to 0x%x\n", adpa);  in intel_crt_reset()