Lines Matching refs:DP_TP_CTL
380 I915_WRITE(DP_TP_CTL(PORT_E), in hsw_fdi_link_train()
423 I915_WRITE(DP_TP_CTL(PORT_E), in hsw_fdi_link_train()
438 temp = I915_READ(DP_TP_CTL(PORT_E)); in hsw_fdi_link_train()
441 I915_WRITE(DP_TP_CTL(PORT_E), temp); in hsw_fdi_link_train()
442 POSTING_READ(DP_TP_CTL(PORT_E)); in hsw_fdi_link_train()
1609 val = I915_READ(DP_TP_CTL(port)); in intel_ddi_post_disable()
1612 I915_WRITE(DP_TP_CTL(port), val); in intel_ddi_post_disable()
2006 if (I915_READ(DP_TP_CTL(port)) & DP_TP_CTL_ENABLE) { in intel_ddi_prepare_link_retrain()
2014 val = I915_READ(DP_TP_CTL(port)); in intel_ddi_prepare_link_retrain()
2017 I915_WRITE(DP_TP_CTL(port), val); in intel_ddi_prepare_link_retrain()
2018 POSTING_READ(DP_TP_CTL(port)); in intel_ddi_prepare_link_retrain()
2033 I915_WRITE(DP_TP_CTL(port), val); in intel_ddi_prepare_link_retrain()
2034 POSTING_READ(DP_TP_CTL(port)); in intel_ddi_prepare_link_retrain()