Lines Matching refs:crtc_state
495 intel_ddi_get_crtc_new_encoder(struct intel_crtc_state *crtc_state) in intel_ddi_get_crtc_new_encoder() argument
497 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); in intel_ddi_get_crtc_new_encoder()
503 state = crtc_state->base.state; in intel_ddi_get_crtc_new_encoder()
507 state->connector_states[i]->crtc != crtc_state->base.crtc) in intel_ddi_get_crtc_new_encoder()
959 struct intel_crtc_state *crtc_state, in hsw_ddi_pll_select() argument
974 crtc_state->dpll_hw_state.wrpll = val; in hsw_ddi_pll_select()
976 pll = intel_get_shared_dpll(intel_crtc, crtc_state); in hsw_ddi_pll_select()
983 crtc_state->ddi_pll_sel = PORT_CLK_SEL_WRPLL(pll->id); in hsw_ddi_pll_select()
1146 struct intel_crtc_state *crtc_state, in skl_ddi_pll_select() argument
1196 crtc_state->dpll_hw_state.ctrl1 = ctrl1; in skl_ddi_pll_select()
1197 crtc_state->dpll_hw_state.cfgcr1 = cfgcr1; in skl_ddi_pll_select()
1198 crtc_state->dpll_hw_state.cfgcr2 = cfgcr2; in skl_ddi_pll_select()
1200 pll = intel_get_shared_dpll(intel_crtc, crtc_state); in skl_ddi_pll_select()
1208 crtc_state->ddi_pll_sel = pll->id + 1; in skl_ddi_pll_select()
1221 struct intel_crtc_state *crtc_state) in intel_ddi_pll_select() argument
1225 intel_ddi_get_crtc_new_encoder(crtc_state); in intel_ddi_pll_select()
1226 int clock = crtc_state->port_clock; in intel_ddi_pll_select()
1229 return skl_ddi_pll_select(intel_crtc, crtc_state, in intel_ddi_pll_select()
1232 return hsw_ddi_pll_select(intel_crtc, crtc_state, in intel_ddi_pll_select()