Lines Matching refs:PCH_DREF_CONTROL
1418 val = I915_READ(PCH_DREF_CONTROL); in ibx_assert_pch_refclk_enabled()
7172 val = I915_READ(PCH_DREF_CONTROL); in ironlake_init_pch_refclk()
7230 I915_WRITE(PCH_DREF_CONTROL, val); in ironlake_init_pch_refclk()
7231 POSTING_READ(PCH_DREF_CONTROL); in ironlake_init_pch_refclk()
7246 I915_WRITE(PCH_DREF_CONTROL, val); in ironlake_init_pch_refclk()
7247 POSTING_READ(PCH_DREF_CONTROL); in ironlake_init_pch_refclk()
7257 I915_WRITE(PCH_DREF_CONTROL, val); in ironlake_init_pch_refclk()
7258 POSTING_READ(PCH_DREF_CONTROL); in ironlake_init_pch_refclk()
7268 I915_WRITE(PCH_DREF_CONTROL, val); in ironlake_init_pch_refclk()
7269 POSTING_READ(PCH_DREF_CONTROL); in ironlake_init_pch_refclk()
13797 bool bios_lvds_use_ssc = !!(I915_READ(PCH_DREF_CONTROL) & in intel_modeset_init()