2340 	info->pitch = fb->pitches[0];  in intel_fill_fb_ggtt_view()
2565 		obj->stride = fb->pitches[0];  in intel_alloc_initial_plane_obj()
2570 	mode_cmd.pitches[0] = fb->pitches[0];  in intel_alloc_initial_plane_obj()
2756 	linear_offset = y * fb->pitches[0] + x * pixel_size;  in i9xx_update_primary_plane()
2762 						       fb->pitches[0]);  in i9xx_update_primary_plane()
2777 			(intel_crtc->config->pipe_src_h - 1) * fb->pitches[0] +  in i9xx_update_primary_plane()
2783 	I915_WRITE(DSPSTRIDE(plane), fb->pitches[0]);  in i9xx_update_primary_plane()
2861 	linear_offset = y * fb->pitches[0] + x * pixel_size;  in ironlake_update_primary_plane()
2865 					       fb->pitches[0]);  in ironlake_update_primary_plane()
2877 				(intel_crtc->config->pipe_src_h - 1) * fb->pitches[0] +  in ironlake_update_primary_plane()
2884 	I915_WRITE(DSPSTRIDE(plane), fb->pitches[0]);  in ironlake_update_primary_plane()
3026 	I915_WRITE(PLANE_STRIDE(pipe, 0), fb->pitches[0] / stride_div);  in skylake_update_primary_plane()
6992 	fb->pitches[0] = val & 0xffffffc0;  in i9xx_get_initial_plane_config()
6998 	plane_config->size = fb->pitches[0] * aligned_height;  in i9xx_get_initial_plane_config()
7002 		      fb->bits_per_pixel, base, fb->pitches[0],  in i9xx_get_initial_plane_config()
8056 	fb->pitches[0] = (val & 0x3ff) * stride_mult;  in skylake_get_initial_plane_config()
8062 	plane_config->size = fb->pitches[0] * aligned_height;  in skylake_get_initial_plane_config()
8066 		      fb->bits_per_pixel, base, fb->pitches[0],  in skylake_get_initial_plane_config()
8153 	fb->pitches[0] = val & 0xffffffc0;  in ironlake_get_initial_plane_config()
8159 	plane_config->size = fb->pitches[0] * aligned_height;  in ironlake_get_initial_plane_config()
8163 		      fb->bits_per_pixel, base, fb->pitches[0],  in ironlake_get_initial_plane_config()
8940 	mode_cmd.pitches[0] = intel_framebuffer_pitch_for_width(mode_cmd.width,  in intel_framebuffer_create_for_mode()
8966 	if (fb->pitches[0] < intel_framebuffer_pitch_for_width(mode->hdisplay,  in mode_fits_in_fbdev()
8970 	if (obj->base.size < mode->vdisplay * fb->pitches[0])  in mode_fits_in_fbdev()
9673 	intel_ring_emit(ring, fb->pitches[0]);  in intel_gen2_queue_flip()
9705 	intel_ring_emit(ring, fb->pitches[0]);  in intel_gen3_queue_flip()
9736 	intel_ring_emit(ring, fb->pitches[0]);  in intel_gen4_queue_flip()
9771 	intel_ring_emit(ring, fb->pitches[0] | obj->tiling_mode);  in intel_gen6_queue_flip()
9875 	intel_ring_emit(ring, (fb->pitches[0] | obj->tiling_mode));  in intel_gen7_queue_flip()
9930 	stride = fb->pitches[0] >> 6;  in skl_do_mmio_flip()
9932 		stride = fb->pitches[0] >> 9; /* X tiles are 512 bytes wide */  in skl_do_mmio_flip()
10136 	     fb->pitches[0] != crtc->primary->fb->pitches[0]))  in intel_crtc_page_flip()
13306 	if (mode_cmd->pitches[0] & (stride_alignment - 1)) {  in intel_framebuffer_init()
13308 			  mode_cmd->pitches[0], stride_alignment);  in intel_framebuffer_init()
13314 	if (mode_cmd->pitches[0] > pitch_limit) {  in intel_framebuffer_init()
13318 			  mode_cmd->pitches[0], pitch_limit);  in intel_framebuffer_init()
13323 	    mode_cmd->pitches[0] != obj->stride) {  in intel_framebuffer_init()
13325 			  mode_cmd->pitches[0], obj->stride);  in intel_framebuffer_init()
13380 	if (obj->base.size < aligned_height * mode_cmd->pitches[0])  in intel_framebuffer_init()