339 	DRM_DEBUG_KMS("kicking pipe %c power sequencer for port %c\n",  in vlv_power_sequencer_kick()
431 	DRM_DEBUG_KMS("picked pipe %c power sequencer for port %c\n",  in vlv_power_sequencer_pipe()
517 		DRM_DEBUG_KMS("no initial power sequencer for port %c\n",  in vlv_initial_power_sequencer_setup()
522 	DRM_DEBUG_KMS("initial power sequencer for port %c: pipe %c\n",  in vlv_initial_power_sequencer_setup()
653 		DRM_DEBUG_KMS("Status 0x%08x Control 0x%08x\n",  in intel_dp_check_edp()
906 		DRM_DEBUG_KMS("dp_aux_ch timeout status 0x%08x\n", status);  in intel_dp_aux_ch()
1051 	DRM_DEBUG_KMS("registering %s bus for %s\n", name,  in intel_dp_aux_init()
1286 	DRM_DEBUG_KMS("source rates: %s\n", str);  in intel_dp_print_rates()
1290 	DRM_DEBUG_KMS("sink rates: %s\n", str);  in intel_dp_print_rates()
1294 	DRM_DEBUG_KMS("common rates: %s\n", str);  in intel_dp_print_rates()
1376 	DRM_DEBUG_KMS("DP link computation with max lane count %i "  in intel_dp_compute_config()
1386 			DRM_DEBUG_KMS("clamping bpp for eDP panel to BIOS-provided %i\n",  in intel_dp_compute_config()
1455 	DRM_DEBUG_KMS("DP link bw %02x lane count %d clock %d bpp %d\n",  in intel_dp_compute_config()
1458 	DRM_DEBUG_KMS("DP link bw required %i available %i\n",  in intel_dp_compute_config()
1493 	DRM_DEBUG_KMS("eDP PLL enable for clock %d\n",  in ironlake_set_pll_cpu_edp()
1502 		DRM_DEBUG_KMS("160MHz cpu eDP clock, might need ilk devA w/a\n");  in ironlake_set_pll_cpu_edp()
1613 	DRM_DEBUG_KMS("mask %08x value %08x status %08x control %08x\n",  in wait_panel_status()
1624 	DRM_DEBUG_KMS("Wait complete\n");  in wait_panel_status()
1629 	DRM_DEBUG_KMS("Wait for panel power on\n");  in wait_panel_on()
1635 	DRM_DEBUG_KMS("Wait for panel power off time\n");  in wait_panel_off()
1641 	DRM_DEBUG_KMS("Wait for panel power cycle\n");  in wait_panel_power_cycle()
1711 	DRM_DEBUG_KMS("Turning eDP port %c VDD on\n",  in edp_panel_vdd_on()
1725 	DRM_DEBUG_KMS("PP_STATUS: 0x%08x PP_CONTROL: 0x%08x\n",  in edp_panel_vdd_on()
1731 		DRM_DEBUG_KMS("eDP port %c panel power wasn't enabled\n",  in edp_panel_vdd_on()
1779 	DRM_DEBUG_KMS("Turning eDP port %c VDD off\n",  in edp_panel_vdd_off_sync()
1792 	DRM_DEBUG_KMS("PP_STATUS: 0x%08x PP_CONTROL: 0x%08x\n",  in edp_panel_vdd_off_sync()
1864 	DRM_DEBUG_KMS("Turn eDP port %c panel power on\n",  in edp_panel_on()
1926 	DRM_DEBUG_KMS("Turn eDP port %c panel power off\n",  in edp_panel_off()
1999 	DRM_DEBUG_KMS("\n");  in intel_edp_backlight_on()
2038 	DRM_DEBUG_KMS("\n");  in intel_edp_backlight_off()
2061 	DRM_DEBUG_KMS("panel power control backlight %s\n",  in intel_edp_backlight_power()
2081 	DRM_DEBUG_KMS("\n");  in ironlake_edp_pll_on()
2148 		DRM_DEBUG_KMS("failed to %s sink power state\n",  in intel_dp_sink_dpms()
2204 		DRM_DEBUG_KMS("No pipe for dp port 0x%x found\n",  in intel_dp_get_hw_state()
2289 		DRM_DEBUG_KMS("pipe has %d bpp for eDP panel, overriding BIOS-provided max %d bpp\n",  in intel_dp_get_config()
2566 	DRM_DEBUG_KMS("detaching pipe %c power sequencer from port %c\n",  in vlv_detach_power_sequencer()
2599 		DRM_DEBUG_KMS("stealing pipe %c power sequencer from port %c\n",  in vlv_steal_power_sequencer()
2644 	DRM_DEBUG_KMS("initializing pipe %c power sequencer for port %c\n",  in vlv_init_panel_power_sequencer()
3334 		DRM_DEBUG_KMS("Unsupported voltage swing/pre-emphasis level:"  in intel_gen6_edp_signal_levels()
3365 		DRM_DEBUG_KMS("Unsupported voltage swing/pre-emphasis level:"  in intel_gen7_edp_signal_levels()
3402 		DRM_DEBUG_KMS("Unsupported voltage swing/pre-emphasis level:"  in intel_hsw_signal_levels()
3438 	DRM_DEBUG_KMS("Using signal levels %08x\n", signal_levels);  in intel_dp_set_signal_levels()
3589 			DRM_DEBUG_KMS("clock recovery OK\n");  in intel_dp_start_link_train()
3707 		DRM_DEBUG_KMS("Channel EQ done. DP Training successful\n");  in intel_dp_complete_link_train()
3732 	DRM_DEBUG_KMS("\n");  in intel_dp_link_down()
3779 	DRM_DEBUG_KMS("DPCD: %*ph\n", (int) sizeof(intel_dp->dpcd), intel_dp->dpcd);  in intel_dp_get_dpcd()
3792 			DRM_DEBUG_KMS("Detected EDP PSR Panel.\n");  in intel_dp_get_dpcd()
3806 		DRM_DEBUG_KMS("Displayport TPS3 supported\n");  in intel_dp_get_dpcd()
3861 		DRM_DEBUG_KMS("Sink OUI: %02hx%02hx%02hx\n",  in intel_dp_probe_oui()
3865 		DRM_DEBUG_KMS("Branch OUI: %02hx%02hx%02hx\n",  in intel_dp_probe_oui()
3882 			DRM_DEBUG_KMS("Sink is MST capable\n");  in intel_dp_probe_mst()
3885 			DRM_DEBUG_KMS("Sink is not MST capable\n");  in intel_dp_probe_mst()
3929 		DRM_DEBUG_KMS("Panel is unable to calculate CRC after 6 vblanks\n");  in intel_dp_sink_crc()
3990 				DRM_DEBUG_KMS("channel EQ not ok, retraining\n");  in intel_dp_check_mst_status()
3996 			DRM_DEBUG_KMS("got esi %3ph\n", esi);  in intel_dp_check_mst_status()
4012 					DRM_DEBUG_KMS("got esi2 %3ph\n", esi);  in intel_dp_check_mst_status()
4021 			DRM_DEBUG_KMS("failed to get ESI - device may have failed\n");  in intel_dp_check_mst_status()
4083 		DRM_DEBUG_KMS("%s: channel EQ not ok, retraining\n",  in intel_dp_check_link_status()
4137 	DRM_DEBUG_KMS("Broken DP branch device, ignoring\n");  in intel_dp_detect_dpcd()
4308 	DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",  in intel_dp_detect()
4361 	DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",  in intel_dp_force()
4485 			DRM_DEBUG_KMS("no scaling not supported\n");  in intel_dp_set_property()
4587 	DRM_DEBUG_KMS("VDD left on by BIOS, adjusting state tracking\n");  in intel_edp_panel_vdd_sanitize()
4666 		DRM_DEBUG_KMS("ignoring long hpd on eDP port %c\n",  in intel_dp_hpd_pulse()
4671 	DRM_DEBUG_KMS("got hpd irq on port %c - %s\n",  in intel_dp_hpd_pulse()
4719 …DRM_DEBUG_KMS("MST device may have disappeared %d vs %d\n", intel_dp->is_mst, intel_dp->mst_mgr.ms…  in intel_dp_hpd_pulse()
4858 	DRM_DEBUG_KMS("cur t1_t3 %d t8 %d t9 %d t10 %d t11_t12 %d\n",  in intel_dp_init_panel_power_sequencer()
4875 	DRM_DEBUG_KMS("vbt t1_t3 %d t8 %d t9 %d t10 %d t11_t12 %d\n",  in intel_dp_init_panel_power_sequencer()
4898 	DRM_DEBUG_KMS("panel power up delay %d, power down delay %d, power cycle delay %d\n",  in intel_dp_init_panel_power_sequencer()
4902 	DRM_DEBUG_KMS("backlight on delay %d, off delay %d\n",  in intel_dp_init_panel_power_sequencer()
4966 	DRM_DEBUG_KMS("panel power sequencer register settings: PP_ON %#x, PP_OFF %#x, PP_DIV %#x\n",  in intel_dp_init_panel_power_sequencer_registers()
4996 		DRM_DEBUG_KMS("Refresh rate should be positive non-zero.\n");  in intel_dp_set_drrs_state()
5001 		DRM_DEBUG_KMS("DRRS not supported.\n");  in intel_dp_set_drrs_state()
5015 		DRM_DEBUG_KMS("DRRS: intel_crtc not initialized\n");  in intel_dp_set_drrs_state()
5022 		DRM_DEBUG_KMS("Only Seamless DRRS supported.\n");  in intel_dp_set_drrs_state()
5031 		DRM_DEBUG_KMS(  in intel_dp_set_drrs_state()
5037 		DRM_DEBUG_KMS("eDP encoder disabled. CRTC not Active\n");  in intel_dp_set_drrs_state()
5073 	DRM_DEBUG_KMS("eDP Refresh Rate set to : %dHz\n", refresh_rate);  in intel_dp_set_drrs_state()
5091 		DRM_DEBUG_KMS("Panel doesn't support DRRS\n");  in intel_edp_drrs_enable()
5319 		DRM_DEBUG_KMS("DRRS supported for Gen7 and above\n");  in intel_dp_drrs_init()
5324 		DRM_DEBUG_KMS("VBT doesn't support DRRS\n");  in intel_dp_drrs_init()
5332 		DRM_DEBUG_KMS("Downclock mode is not found. DRRS not supported\n");  in intel_dp_drrs_init()
5339 	DRM_DEBUG_KMS("seamless DRRS supported for eDP panel.\n");  in intel_dp_drrs_init()
5439 		DRM_DEBUG_KMS("using pipe %c for initial backlight setup\n",  in intel_edp_init_connector()
5503 	DRM_DEBUG_KMS("Adding %s connector on port %c\n",  in intel_dp_init_connector()