334 	if (WARN(I915_READ(intel_dp->output_reg) & DP_PORT_EN,  in vlv_power_sequencer_kick()
345 	DP = I915_READ(intel_dp->output_reg) & DP_DETECTED;  in vlv_power_sequencer_kick()
371 	I915_WRITE(intel_dp->output_reg, DP);  in vlv_power_sequencer_kick()
372 	POSTING_READ(intel_dp->output_reg);  in vlv_power_sequencer_kick()
374 	I915_WRITE(intel_dp->output_reg, DP | DP_PORT_EN);  in vlv_power_sequencer_kick()
375 	POSTING_READ(intel_dp->output_reg);  in vlv_power_sequencer_kick()
377 	I915_WRITE(intel_dp->output_reg, DP & ~DP_PORT_EN);  in vlv_power_sequencer_kick()
378 	POSTING_READ(intel_dp->output_reg);  in vlv_power_sequencer_kick()
1045 		intel_dp->aux_ch_ctl_reg = intel_dp->output_reg + 0x10;  in intel_dp_aux_init()
1545 	intel_dp->DP = I915_READ(intel_dp->output_reg) & DP_DETECTED;  in intel_dp_prepare()
2166 	tmp = I915_READ(intel_dp->output_reg);  in intel_dp_get_hw_state()
2182 		switch (intel_dp->output_reg) {  in intel_dp_get_hw_state()
2205 			      intel_dp->output_reg);  in intel_dp_get_hw_state()
2222 	tmp = I915_READ(intel_dp->output_reg);  in intel_dp_get_config()
2464 	I915_WRITE(intel_dp->output_reg, intel_dp->DP);  in intel_dp_enable_port()
2465 	POSTING_READ(intel_dp->output_reg);  in intel_dp_enable_port()
2475 	I915_WRITE(intel_dp->output_reg, intel_dp->DP);  in intel_dp_enable_port()
2476 	POSTING_READ(intel_dp->output_reg);  in intel_dp_enable_port()
2485 	uint32_t dp_reg = I915_READ(intel_dp->output_reg);  in intel_enable_dp()
3456 	I915_WRITE(intel_dp->output_reg, *DP);  in intel_dp_set_link_train()
3457 	POSTING_READ(intel_dp->output_reg);  in intel_dp_set_link_train()
3497 	I915_WRITE(intel_dp->output_reg, *DP);  in intel_dp_update_link_train()
3498 	POSTING_READ(intel_dp->output_reg);  in intel_dp_update_link_train()
3729 	if (WARN_ON((I915_READ(intel_dp->output_reg) & DP_PORT_EN) == 0))  in intel_dp_link_down()
3736 		I915_WRITE(intel_dp->output_reg, DP | DP_LINK_TRAIN_PAT_IDLE_CPT);  in intel_dp_link_down()
3742 		I915_WRITE(intel_dp->output_reg, DP | DP_LINK_TRAIN_PAT_IDLE);  in intel_dp_link_down()
3744 	POSTING_READ(intel_dp->output_reg);  in intel_dp_link_down()
3747 	    I915_READ(intel_dp->output_reg) & DP_PIPEB_SELECT) {  in intel_dp_link_down()
3757 		I915_WRITE(intel_dp->output_reg, DP);  in intel_dp_link_down()
3758 		POSTING_READ(intel_dp->output_reg);  in intel_dp_link_down()
3762 	I915_WRITE(intel_dp->output_reg, DP & ~DP_PORT_EN);  in intel_dp_link_down()
3763 	POSTING_READ(intel_dp->output_reg);  in intel_dp_link_down()
4742 			return intel_dp->output_reg;  in intel_trans_dp_port_sel()
5482 	intel_dp->DP = I915_READ(intel_dp->output_reg);  in intel_dp_init_connector()
5595 intel_dp_init(struct drm_device *dev, int output_reg, enum port port)  in intel_dp_init()  argument
5642 	intel_dig_port->dp.output_reg = output_reg;  in intel_dp_init()