58 	if (wait_for((I915_READ(MIPI_GEN_FIFO_STAT(port)) & mask) == mask, 100))  in wait_for_dsi_fifo_empty()
83 		u32 val = I915_READ(reg);  in read_data()
124 		if (wait_for((I915_READ(MIPI_GEN_FIFO_STAT(port)) & data_mask) == 0, 50))  in intel_dsi_host_transfer()
135 	if (wait_for((I915_READ(MIPI_GEN_FIFO_STAT(port)) & ctrl_mask) == 0, 50)) {  in intel_dsi_host_transfer()
144 		if (wait_for((I915_READ(MIPI_INTR_STAT(port)) & data_mask) == data_mask, 50))  in intel_dsi_host_transfer()
228 	if (cmd == I915_READ(MIPI_DPI_CONTROL(port)))  in dpi_send_cmd()
234 	if (wait_for((I915_READ(MIPI_INTR_STAT(port)) & mask) == mask, 100))  in dpi_send_cmd()
299 		temp = I915_READ(VLV_CHICKEN_3);  in intel_dsi_port_enable()
307 		temp = I915_READ(MIPI_PORT_CTRL(port));  in intel_dsi_port_enable()
334 		temp = I915_READ(MIPI_PORT_CTRL(port));  in intel_dsi_port_disable()
367 		val = I915_READ(MIPI_PORT_CTRL(PORT_A));  in intel_dsi_device_ready()
420 	tmp = I915_READ(DPLL(pipe));  in intel_dsi_pre_enable()
428 	tmp = I915_READ(DSPCLK_GATE_D);  in intel_dsi_pre_enable()
494 		temp = I915_READ(MIPI_CTRL(port));  in intel_dsi_disable()
502 		temp = I915_READ(MIPI_DSI_FUNC_PRG(port));  in intel_dsi_disable()
541 		if (wait_for(((I915_READ(MIPI_PORT_CTRL(PORT_A)) & AFE_LATCHOUT)  in intel_dsi_clear_device_ready()
548 		val = I915_READ(MIPI_PORT_CTRL(PORT_A));  in intel_dsi_clear_device_ready()
571 	val = I915_READ(DSPCLK_GATE_D);  in intel_dsi_post_disable()
599 		func = I915_READ(MIPI_DSI_FUNC_PRG(port));  in intel_dsi_get_hw_state()
600 		dpi_enabled = I915_READ(MIPI_PORT_CTRL(port)) &  in intel_dsi_get_hw_state()
609 			dpi_enabled = I915_READ(PIPECONF(PIPE_B)) &  in intel_dsi_get_hw_state()
613 			if (I915_READ(MIPI_DEVICE_READY(port)) & DEVICE_READY) {  in intel_dsi_get_hw_state()
771 		tmp = I915_READ(MIPI_CTRL(PORT_A));  in intel_dsi_prepare()
776 		tmp = I915_READ(MIPI_CTRL(port));  in intel_dsi_prepare()