Lines Matching refs:vlv_dpio_write
1299 vlv_dpio_write(dev_priv, pipe, VLV_PCS_DW8(port), val); in vlv_hdmi_pre_enable()
1302 vlv_dpio_write(dev_priv, pipe, VLV_TX_DW5(port), 0); in vlv_hdmi_pre_enable()
1303 vlv_dpio_write(dev_priv, pipe, VLV_TX_DW4(port), 0x2b245f5f); in vlv_hdmi_pre_enable()
1304 vlv_dpio_write(dev_priv, pipe, VLV_TX_DW2(port), 0x5578b83a); in vlv_hdmi_pre_enable()
1305 vlv_dpio_write(dev_priv, pipe, VLV_TX_DW3(port), 0x0c782040); in vlv_hdmi_pre_enable()
1306 vlv_dpio_write(dev_priv, pipe, VLV_TX3_DW4(port), 0x2b247878); in vlv_hdmi_pre_enable()
1307 vlv_dpio_write(dev_priv, pipe, VLV_PCS_DW11(port), 0x00030000); in vlv_hdmi_pre_enable()
1308 vlv_dpio_write(dev_priv, pipe, VLV_PCS_DW9(port), 0x00002000); in vlv_hdmi_pre_enable()
1309 vlv_dpio_write(dev_priv, pipe, VLV_TX_DW5(port), DPIO_TX_OCALINIT_EN); in vlv_hdmi_pre_enable()
1312 vlv_dpio_write(dev_priv, pipe, VLV_PCS_DW14(port), 0x00760018); in vlv_hdmi_pre_enable()
1313 vlv_dpio_write(dev_priv, pipe, VLV_PCS_DW23(port), 0x00400888); in vlv_hdmi_pre_enable()
1339 vlv_dpio_write(dev_priv, pipe, VLV_PCS_DW0(port), in vlv_hdmi_pre_pll_enable()
1342 vlv_dpio_write(dev_priv, pipe, VLV_PCS_DW1(port), in vlv_hdmi_pre_pll_enable()
1349 vlv_dpio_write(dev_priv, pipe, VLV_PCS_DW12(port), 0x00750f00); in vlv_hdmi_pre_pll_enable()
1350 vlv_dpio_write(dev_priv, pipe, VLV_TX_DW11(port), 0x00001500); in vlv_hdmi_pre_pll_enable()
1351 vlv_dpio_write(dev_priv, pipe, VLV_TX_DW14(port), 0x40400000); in vlv_hdmi_pre_pll_enable()
1353 vlv_dpio_write(dev_priv, pipe, VLV_PCS_DW9(port), 0x00002000); in vlv_hdmi_pre_pll_enable()
1354 vlv_dpio_write(dev_priv, pipe, VLV_TX_DW5(port), DPIO_TX_OCALINIT_EN); in vlv_hdmi_pre_pll_enable()
1381 vlv_dpio_write(dev_priv, pipe, _CHV_CMN_DW5_CH0, val); in chv_hdmi_pre_pll_enable()
1389 vlv_dpio_write(dev_priv, pipe, _CHV_CMN_DW1_CH1, val); in chv_hdmi_pre_pll_enable()
1399 vlv_dpio_write(dev_priv, pipe, VLV_PCS01_DW8(ch), val); in chv_hdmi_pre_pll_enable()
1407 vlv_dpio_write(dev_priv, pipe, VLV_PCS23_DW8(ch), val); in chv_hdmi_pre_pll_enable()
1419 vlv_dpio_write(dev_priv, pipe, CHV_CMN_DW19(ch), val); in chv_hdmi_pre_pll_enable()
1435 vlv_dpio_write(dev_priv, pipe, VLV_PCS_DW0(port), 0x00000000); in vlv_hdmi_post_disable()
1436 vlv_dpio_write(dev_priv, pipe, VLV_PCS_DW1(port), 0x00e00060); in vlv_hdmi_post_disable()
1456 vlv_dpio_write(dev_priv, pipe, VLV_PCS01_DW1(ch), val); in chv_hdmi_post_disable()
1460 vlv_dpio_write(dev_priv, pipe, VLV_PCS23_DW1(ch), val); in chv_hdmi_post_disable()
1464 vlv_dpio_write(dev_priv, pipe, VLV_PCS01_DW0(ch), val); in chv_hdmi_post_disable()
1468 vlv_dpio_write(dev_priv, pipe, VLV_PCS23_DW0(ch), val); in chv_hdmi_post_disable()
1493 vlv_dpio_write(dev_priv, pipe, VLV_PCS01_DW11(ch), val); in chv_hdmi_pre_enable()
1497 vlv_dpio_write(dev_priv, pipe, VLV_PCS23_DW11(ch), val); in chv_hdmi_pre_enable()
1502 vlv_dpio_write(dev_priv, pipe, VLV_PCS01_DW1(ch), val); in chv_hdmi_pre_enable()
1506 vlv_dpio_write(dev_priv, pipe, VLV_PCS23_DW1(ch), val); in chv_hdmi_pre_enable()
1510 vlv_dpio_write(dev_priv, pipe, VLV_PCS01_DW0(ch), val); in chv_hdmi_pre_enable()
1514 vlv_dpio_write(dev_priv, pipe, VLV_PCS23_DW0(ch), val); in chv_hdmi_pre_enable()
1520 vlv_dpio_write(dev_priv, pipe, CHV_TX_DW14(ch, i), in chv_hdmi_pre_enable()
1532 vlv_dpio_write(dev_priv, pipe, VLV_PCS01_DW10(ch), val); in chv_hdmi_pre_enable()
1538 vlv_dpio_write(dev_priv, pipe, VLV_PCS23_DW10(ch), val); in chv_hdmi_pre_enable()
1543 vlv_dpio_write(dev_priv, pipe, VLV_PCS01_DW9(ch), val); in chv_hdmi_pre_enable()
1548 vlv_dpio_write(dev_priv, pipe, VLV_PCS23_DW9(ch), val); in chv_hdmi_pre_enable()
1556 vlv_dpio_write(dev_priv, pipe, CHV_TX_DW4(ch, i), val); in chv_hdmi_pre_enable()
1563 vlv_dpio_write(dev_priv, pipe, CHV_TX_DW2(ch, i), val); in chv_hdmi_pre_enable()
1570 vlv_dpio_write(dev_priv, pipe, CHV_TX_DW3(ch, i), val); in chv_hdmi_pre_enable()
1580 vlv_dpio_write(dev_priv, pipe, VLV_TX_DW3(ch), val); in chv_hdmi_pre_enable()
1582 vlv_dpio_write(dev_priv, pipe, VLV_TX_DW2(ch), in chv_hdmi_pre_enable()
1589 vlv_dpio_write(dev_priv, pipe, VLV_PCS01_DW10(ch), val); in chv_hdmi_pre_enable()
1593 vlv_dpio_write(dev_priv, pipe, VLV_PCS23_DW10(ch), val); in chv_hdmi_pre_enable()
1598 vlv_dpio_write(dev_priv, pipe, CHV_CMN_DW30, val); in chv_hdmi_pre_enable()