3959 	WARN_ON(val < dev_priv->rps.min_freq);  in gen6_set_rps()
3998 	WARN_ON(val < dev_priv->rps.min_freq);  in valleyview_set_rps()
4220 	dev_priv->rps.min_freq		= (rp_state_cap >> 16) & 0xff;  in gen6_init_rps_frequencies()
4226 		dev_priv->rps.min_freq *= GEN9_FREQ_SCALER;  in gen6_init_rps_frequencies()
4240 					dev_priv->rps.min_freq,  in gen6_init_rps_frequencies()
4244 	dev_priv->rps.idle_freq = dev_priv->rps.min_freq;  in gen6_init_rps_frequencies()
4257 				dev_priv->rps.min_freq;  in gen6_init_rps_frequencies()
4528 	int min_freq = 15;  in __gen6_update_ring_freq()  local
4560 	for (gpu_freq = dev_priv->rps.max_freq; gpu_freq >= dev_priv->rps.min_freq;  in __gen6_update_ring_freq()
4580 			if (gpu_freq < min_freq)  in __gen6_update_ring_freq()
4866 	dev_priv->rps.min_freq = valleyview_rps_min_freq(dev_priv);  in valleyview_init_gt_powersave()
4868 			 intel_gpu_freq(dev_priv, dev_priv->rps.min_freq),  in valleyview_init_gt_powersave()
4869 			 dev_priv->rps.min_freq);  in valleyview_init_gt_powersave()
4871 	dev_priv->rps.idle_freq = dev_priv->rps.min_freq;  in valleyview_init_gt_powersave()
4878 		dev_priv->rps.min_freq_softlimit = dev_priv->rps.min_freq;  in valleyview_init_gt_powersave()
4937 	dev_priv->rps.min_freq = cherryview_rps_min_freq(dev_priv);  in cherryview_init_gt_powersave()
4939 			 intel_gpu_freq(dev_priv, dev_priv->rps.min_freq),  in cherryview_init_gt_powersave()
4940 			 dev_priv->rps.min_freq);  in cherryview_init_gt_powersave()
4945 		   dev_priv->rps.min_freq) & 1,  in cherryview_init_gt_powersave()
4948 	dev_priv->rps.idle_freq = dev_priv->rps.min_freq;  in cherryview_init_gt_powersave()
4955 		dev_priv->rps.min_freq_softlimit = dev_priv->rps.min_freq;  in cherryview_init_gt_powersave()
5728 	WARN_ON(dev_priv->rps.max_freq < dev_priv->rps.min_freq);  in intel_gen6_powersave_work()
5731 	WARN_ON(dev_priv->rps.efficient_freq < dev_priv->rps.min_freq);  in intel_gen6_powersave_work()