3705 	u16 rgvswctl;  in ironlake_set_drps()  local
3709 	rgvswctl = I915_READ16(MEMSWCTL);  in ironlake_set_drps()
3710 	if (rgvswctl & MEMCTL_CMD_STS) {  in ironlake_set_drps()
3715 	rgvswctl = (MEMCTL_CMD_CHFREQ << MEMCTL_CMD_SHIFT) |  in ironlake_set_drps()
3717 	I915_WRITE16(MEMSWCTL, rgvswctl);  in ironlake_set_drps()
3720 	rgvswctl |= MEMCTL_CMD_STS;  in ironlake_set_drps()
3721 	I915_WRITE16(MEMSWCTL, rgvswctl);  in ironlake_set_drps()
3797 	u16 rgvswctl;  in ironlake_disable_drps()  local
3801 	rgvswctl = I915_READ16(MEMSWCTL);  in ironlake_disable_drps()
3813 	rgvswctl |= MEMCTL_CMD_STS;  in ironlake_disable_drps()
3814 	I915_WRITE(MEMSWCTL, rgvswctl);  in ironlake_disable_drps()