52 #define for_each_power_well(i, power_well, domain_mask, power_domains)	\  argument
55 		 ((power_well) = &(power_domains)->power_wells[i]);	\
57 		if ((power_well)->domains & (domain_mask))
59 #define for_each_power_well_rev(i, power_well, domain_mask, power_domains) \  argument
61 	     i >= 0 && ((power_well) = &(power_domains)->power_wells[i]);\
63 		if ((power_well)->domains & (domain_mask))
71 				   struct i915_power_well *power_well)  in hsw_power_well_enabled()  argument
93 	struct i915_power_well *power_well;  in __intel_display_power_is_enabled()  local
104 	for_each_power_well_rev(i, power_well, BIT(domain), power_domains) {  in __intel_display_power_is_enabled()
105 		if (power_well->always_on)  in __intel_display_power_is_enabled()
108 		if (!power_well->hw_enabled) {  in __intel_display_power_is_enabled()
203 				       struct i915_power_well *power_well)  in skl_power_well_post_enable()  argument
217 	if (power_well->data == SKL_DISP_PW_2) {  in skl_power_well_post_enable()
226 	if (power_well->data == SKL_DISP_PW_1) {  in skl_power_well_post_enable()
233 			       struct i915_power_well *power_well, bool enable)  in hsw_set_power_well()  argument
323 			struct i915_power_well *power_well, bool enable)  in skl_set_power_well()  argument
332 	switch (power_well->data) {  in skl_set_power_well()
353 		WARN(1, "Unknown power well %lu\n", power_well->data);  in skl_set_power_well()
357 	req_mask = SKL_POWER_WELL_REQ(power_well->data);  in skl_set_power_well()
359 	state_mask = SKL_POWER_WELL_STATE(power_well->data);  in skl_set_power_well()
368 			DRM_DEBUG_KMS("Enabling %s\n", power_well->name);  in skl_set_power_well()
372 					power_well->name);  in skl_set_power_well()
379 			DRM_DEBUG_KMS("Disabling %s\n", power_well->name);  in skl_set_power_well()
384 		if (power_well->data == SKL_DISP_PW_1) {  in skl_set_power_well()
388 		} else if (power_well->data == SKL_DISP_PW_2) {  in skl_set_power_well()
396 		skl_power_well_post_enable(dev_priv, power_well);  in skl_set_power_well()
400 				   struct i915_power_well *power_well)  in hsw_power_well_sync_hw()  argument
402 	hsw_set_power_well(dev_priv, power_well, power_well->count > 0);  in hsw_power_well_sync_hw()
413 				  struct i915_power_well *power_well)  in hsw_power_well_enable()  argument
415 	hsw_set_power_well(dev_priv, power_well, true);  in hsw_power_well_enable()
419 				   struct i915_power_well *power_well)  in hsw_power_well_disable()  argument
421 	hsw_set_power_well(dev_priv, power_well, false);  in hsw_power_well_disable()
425 					struct i915_power_well *power_well)  in skl_power_well_enabled()  argument
427 	uint32_t mask = SKL_POWER_WELL_REQ(power_well->data) |  in skl_power_well_enabled()
428 		SKL_POWER_WELL_STATE(power_well->data);  in skl_power_well_enabled()
434 				struct i915_power_well *power_well)  in skl_power_well_sync_hw()  argument
436 	skl_set_power_well(dev_priv, power_well, power_well->count > 0);  in skl_power_well_sync_hw()
443 				struct i915_power_well *power_well)  in skl_power_well_enable()  argument
445 	skl_set_power_well(dev_priv, power_well, true);  in skl_power_well_enable()
449 				struct i915_power_well *power_well)  in skl_power_well_disable()  argument
451 	skl_set_power_well(dev_priv, power_well, false);  in skl_power_well_disable()
455 					   struct i915_power_well *power_well)  in i9xx_always_on_power_well_noop()  argument
460 					     struct i915_power_well *power_well)  in i9xx_always_on_power_well_enabled()  argument
466 			       struct i915_power_well *power_well, bool enable)  in vlv_set_power_well()  argument
468 	enum punit_power_well power_well_id = power_well->data;  in vlv_set_power_well()
502 				   struct i915_power_well *power_well)  in vlv_power_well_sync_hw()  argument
504 	vlv_set_power_well(dev_priv, power_well, power_well->count > 0);  in vlv_power_well_sync_hw()
508 				  struct i915_power_well *power_well)  in vlv_power_well_enable()  argument
510 	vlv_set_power_well(dev_priv, power_well, true);  in vlv_power_well_enable()
514 				   struct i915_power_well *power_well)  in vlv_power_well_disable()  argument
516 	vlv_set_power_well(dev_priv, power_well, false);  in vlv_power_well_disable()
520 				   struct i915_power_well *power_well)  in vlv_power_well_enabled()  argument
522 	int power_well_id = power_well->data;  in vlv_power_well_enabled()
556 					  struct i915_power_well *power_well)  in vlv_display_power_well_enable()  argument
558 	WARN_ON_ONCE(power_well->data != PUNIT_POWER_WELL_DISP2D);  in vlv_display_power_well_enable()
560 	vlv_set_power_well(dev_priv, power_well, true);  in vlv_display_power_well_enable()
579 					   struct i915_power_well *power_well)  in vlv_display_power_well_disable()  argument
581 	WARN_ON_ONCE(power_well->data != PUNIT_POWER_WELL_DISP2D);  in vlv_display_power_well_disable()
587 	vlv_set_power_well(dev_priv, power_well, false);  in vlv_display_power_well_disable()
593 					   struct i915_power_well *power_well)  in vlv_dpio_cmn_power_well_enable()  argument
595 	WARN_ON_ONCE(power_well->data != PUNIT_POWER_WELL_DPIO_CMN_BC);  in vlv_dpio_cmn_power_well_enable()
606 	vlv_set_power_well(dev_priv, power_well, true);  in vlv_dpio_cmn_power_well_enable()
623 					    struct i915_power_well *power_well)  in vlv_dpio_cmn_power_well_disable()  argument
627 	WARN_ON_ONCE(power_well->data != PUNIT_POWER_WELL_DPIO_CMN_BC);  in vlv_dpio_cmn_power_well_disable()
635 	vlv_set_power_well(dev_priv, power_well, false);  in vlv_dpio_cmn_power_well_disable()
639 					   struct i915_power_well *power_well)  in chv_dpio_cmn_power_well_enable()  argument
643 	WARN_ON_ONCE(power_well->data != PUNIT_POWER_WELL_DPIO_CMN_BC &&  in chv_dpio_cmn_power_well_enable()
644 		     power_well->data != PUNIT_POWER_WELL_DPIO_CMN_D);  in chv_dpio_cmn_power_well_enable()
651 	if (power_well->data == PUNIT_POWER_WELL_DPIO_CMN_BC) {  in chv_dpio_cmn_power_well_enable()
663 	vlv_set_power_well(dev_priv, power_well, true);  in chv_dpio_cmn_power_well_enable()
674 					    struct i915_power_well *power_well)  in chv_dpio_cmn_power_well_disable()  argument
678 	WARN_ON_ONCE(power_well->data != PUNIT_POWER_WELL_DPIO_CMN_BC &&  in chv_dpio_cmn_power_well_disable()
679 		     power_well->data != PUNIT_POWER_WELL_DPIO_CMN_D);  in chv_dpio_cmn_power_well_disable()
681 	if (power_well->data == PUNIT_POWER_WELL_DPIO_CMN_BC) {  in chv_dpio_cmn_power_well_disable()
693 	vlv_set_power_well(dev_priv, power_well, false);  in chv_dpio_cmn_power_well_disable()
697 					struct i915_power_well *power_well)  in chv_pipe_power_well_enabled()  argument
699 	enum pipe pipe = power_well->data;  in chv_pipe_power_well_enabled()
726 				    struct i915_power_well *power_well,  in chv_set_pipe_power_well()  argument
729 	enum pipe pipe = power_well->data;  in chv_set_pipe_power_well()
760 					struct i915_power_well *power_well)  in chv_pipe_power_well_sync_hw()  argument
762 	chv_set_pipe_power_well(dev_priv, power_well, power_well->count > 0);  in chv_pipe_power_well_sync_hw()
766 				       struct i915_power_well *power_well)  in chv_pipe_power_well_enable()  argument
768 	WARN_ON_ONCE(power_well->data != PIPE_A &&  in chv_pipe_power_well_enable()
769 		     power_well->data != PIPE_B &&  in chv_pipe_power_well_enable()
770 		     power_well->data != PIPE_C);  in chv_pipe_power_well_enable()
772 	chv_set_pipe_power_well(dev_priv, power_well, true);  in chv_pipe_power_well_enable()
774 	if (power_well->data == PIPE_A) {  in chv_pipe_power_well_enable()
793 					struct i915_power_well *power_well)  in chv_pipe_power_well_disable()  argument
795 	WARN_ON_ONCE(power_well->data != PIPE_A &&  in chv_pipe_power_well_disable()
796 		     power_well->data != PIPE_B &&  in chv_pipe_power_well_disable()
797 		     power_well->data != PIPE_C);  in chv_pipe_power_well_disable()
799 	if (power_well->data == PIPE_A) {  in chv_pipe_power_well_disable()
805 	chv_set_pipe_power_well(dev_priv, power_well, false);  in chv_pipe_power_well_disable()
807 	if (power_well->data == PIPE_A)  in chv_pipe_power_well_disable()
827 	struct i915_power_well *power_well;  in intel_display_power_get()  local
836 	for_each_power_well(i, power_well, BIT(domain), power_domains) {  in intel_display_power_get()
837 		if (!power_well->count++) {  in intel_display_power_get()
838 			DRM_DEBUG_KMS("enabling %s\n", power_well->name);  in intel_display_power_get()
839 			power_well->ops->enable(dev_priv, power_well);  in intel_display_power_get()
840 			power_well->hw_enabled = true;  in intel_display_power_get()
862 	struct i915_power_well *power_well;  in intel_display_power_put()  local
872 	for_each_power_well_rev(i, power_well, BIT(domain), power_domains) {  in intel_display_power_put()
873 		WARN_ON(!power_well->count);  in intel_display_power_put()
875 		if (!--power_well->count && i915.disable_power_well) {  in intel_display_power_put()
876 			DRM_DEBUG_KMS("disabling %s\n", power_well->name);  in intel_display_power_put()
877 			power_well->hw_enabled = false;  in intel_display_power_put()
878 			power_well->ops->disable(dev_priv, power_well);  in intel_display_power_put()
1254 	struct i915_power_well *power_well;  in lookup_power_well()  local
1257 	for_each_power_well(i, power_well, POWER_DOMAIN_MASK, power_domains) {  in lookup_power_well()
1258 		if (power_well->data == power_well_id)  in lookup_power_well()
1259 			return power_well;  in lookup_power_well()
1392 	struct i915_power_well *power_well;  in intel_power_domains_resume()  local
1396 	for_each_power_well(i, power_well, POWER_DOMAIN_MASK, power_domains) {  in intel_power_domains_resume()
1397 		power_well->ops->sync_hw(dev_priv, power_well);  in intel_power_domains_resume()
1398 		power_well->hw_enabled = power_well->ops->is_enabled(dev_priv,  in intel_power_domains_resume()
1399 								     power_well);  in intel_power_domains_resume()