43 			   u32 port, u32 opcode, u32 addr, u32 *val)  in vlv_sideband_rw()  argument
62 		I915_WRITE(VLV_IOSF_DATA, *val);  in vlv_sideband_rw()
72 		*val = I915_READ(VLV_IOSF_DATA);  in vlv_sideband_rw()
80 	u32 val = 0;  in vlv_punit_read()  local
86 			SB_CRRDDA_NP, addr, &val);  in vlv_punit_read()
89 	return val;  in vlv_punit_read()
92 void vlv_punit_write(struct drm_i915_private *dev_priv, u32 addr, u32 val)  in vlv_punit_write()  argument
98 			SB_CRWRDA_NP, addr, &val);  in vlv_punit_write()
104 	u32 val = 0;  in vlv_bunit_read()  local
107 			SB_CRRDDA_NP, reg, &val);  in vlv_bunit_read()
109 	return val;  in vlv_bunit_read()
112 void vlv_bunit_write(struct drm_i915_private *dev_priv, u32 reg, u32 val)  in vlv_bunit_write()  argument
115 			SB_CRWRDA_NP, reg, &val);  in vlv_bunit_write()
120 	u32 val = 0;  in vlv_nc_read()  local
126 			SB_CRRDDA_NP, addr, &val);  in vlv_nc_read()
129 	return val;  in vlv_nc_read()
134 	u32 val = 0;  in vlv_gpio_nc_read()  local
136 			SB_CRRDDA_NP, reg, &val);  in vlv_gpio_nc_read()
137 	return val;  in vlv_gpio_nc_read()
140 void vlv_gpio_nc_write(struct drm_i915_private *dev_priv, u32 reg, u32 val)  in vlv_gpio_nc_write()  argument
143 			SB_CRWRDA_NP, reg, &val);  in vlv_gpio_nc_write()
148 	u32 val = 0;  in vlv_cck_read()  local
150 			SB_CRRDDA_NP, reg, &val);  in vlv_cck_read()
151 	return val;  in vlv_cck_read()
154 void vlv_cck_write(struct drm_i915_private *dev_priv, u32 reg, u32 val)  in vlv_cck_write()  argument
157 			SB_CRWRDA_NP, reg, &val);  in vlv_cck_write()
162 	u32 val = 0;  in vlv_ccu_read()  local
164 			SB_CRRDDA_NP, reg, &val);  in vlv_ccu_read()
165 	return val;  in vlv_ccu_read()
168 void vlv_ccu_write(struct drm_i915_private *dev_priv, u32 reg, u32 val)  in vlv_ccu_write()  argument
171 			SB_CRWRDA_NP, reg, &val);  in vlv_ccu_write()
176 	u32 val = 0;  in vlv_gps_core_read()  local
178 			SB_CRRDDA_NP, reg, &val);  in vlv_gps_core_read()
179 	return val;  in vlv_gps_core_read()
182 void vlv_gps_core_write(struct drm_i915_private *dev_priv, u32 reg, u32 val)  in vlv_gps_core_write()  argument
185 			SB_CRWRDA_NP, reg, &val);  in vlv_gps_core_write()
190 	u32 val = 0;  in vlv_dpio_read()  local
193 			SB_MRD_NP, reg, &val);  in vlv_dpio_read()
199 	WARN(val == 0xffffffff, "DPIO read pipe %c reg 0x%x == 0x%x\n",  in vlv_dpio_read()
200 	     pipe_name(pipe), reg, val);  in vlv_dpio_read()
202 	return val;  in vlv_dpio_read()
205 void vlv_dpio_write(struct drm_i915_private *dev_priv, enum pipe pipe, int reg, u32 val)  in vlv_dpio_write()  argument
208 			SB_MWR_NP, reg, &val);  in vlv_dpio_write()
272 	u32 val = 0;  in vlv_flisdsi_read()  local
274 			reg, &val);  in vlv_flisdsi_read()
275 	return val;  in vlv_flisdsi_read()
278 void vlv_flisdsi_write(struct drm_i915_private *dev_priv, u32 reg, u32 val)  in vlv_flisdsi_write()  argument
281 			reg, &val);  in vlv_flisdsi_write()