Lines Matching refs:val
217 static inline uint32_t CP_LOAD_STATE_0_DST_OFF(uint32_t val) in CP_LOAD_STATE_0_DST_OFF() argument
219 return ((val) << CP_LOAD_STATE_0_DST_OFF__SHIFT) & CP_LOAD_STATE_0_DST_OFF__MASK; in CP_LOAD_STATE_0_DST_OFF()
223 static inline uint32_t CP_LOAD_STATE_0_STATE_SRC(enum adreno_state_src val) in CP_LOAD_STATE_0_STATE_SRC() argument
225 return ((val) << CP_LOAD_STATE_0_STATE_SRC__SHIFT) & CP_LOAD_STATE_0_STATE_SRC__MASK; in CP_LOAD_STATE_0_STATE_SRC()
229 static inline uint32_t CP_LOAD_STATE_0_STATE_BLOCK(enum adreno_state_block val) in CP_LOAD_STATE_0_STATE_BLOCK() argument
231 return ((val) << CP_LOAD_STATE_0_STATE_BLOCK__SHIFT) & CP_LOAD_STATE_0_STATE_BLOCK__MASK; in CP_LOAD_STATE_0_STATE_BLOCK()
235 static inline uint32_t CP_LOAD_STATE_0_NUM_UNIT(uint32_t val) in CP_LOAD_STATE_0_NUM_UNIT() argument
237 return ((val) << CP_LOAD_STATE_0_NUM_UNIT__SHIFT) & CP_LOAD_STATE_0_NUM_UNIT__MASK; in CP_LOAD_STATE_0_NUM_UNIT()
243 static inline uint32_t CP_LOAD_STATE_1_STATE_TYPE(enum adreno_state_type val) in CP_LOAD_STATE_1_STATE_TYPE() argument
245 return ((val) << CP_LOAD_STATE_1_STATE_TYPE__SHIFT) & CP_LOAD_STATE_1_STATE_TYPE__MASK; in CP_LOAD_STATE_1_STATE_TYPE()
249 static inline uint32_t CP_LOAD_STATE_1_EXT_SRC_ADDR(uint32_t val) in CP_LOAD_STATE_1_EXT_SRC_ADDR() argument
251 return ((val >> 2) << CP_LOAD_STATE_1_EXT_SRC_ADDR__SHIFT) & CP_LOAD_STATE_1_EXT_SRC_ADDR__MASK; in CP_LOAD_STATE_1_EXT_SRC_ADDR()
257 static inline uint32_t CP_DRAW_INDX_0_VIZ_QUERY(uint32_t val) in CP_DRAW_INDX_0_VIZ_QUERY() argument
259 return ((val) << CP_DRAW_INDX_0_VIZ_QUERY__SHIFT) & CP_DRAW_INDX_0_VIZ_QUERY__MASK; in CP_DRAW_INDX_0_VIZ_QUERY()
265 static inline uint32_t CP_DRAW_INDX_1_PRIM_TYPE(enum pc_di_primtype val) in CP_DRAW_INDX_1_PRIM_TYPE() argument
267 return ((val) << CP_DRAW_INDX_1_PRIM_TYPE__SHIFT) & CP_DRAW_INDX_1_PRIM_TYPE__MASK; in CP_DRAW_INDX_1_PRIM_TYPE()
271 static inline uint32_t CP_DRAW_INDX_1_SOURCE_SELECT(enum pc_di_src_sel val) in CP_DRAW_INDX_1_SOURCE_SELECT() argument
273 return ((val) << CP_DRAW_INDX_1_SOURCE_SELECT__SHIFT) & CP_DRAW_INDX_1_SOURCE_SELECT__MASK; in CP_DRAW_INDX_1_SOURCE_SELECT()
277 static inline uint32_t CP_DRAW_INDX_1_VIS_CULL(enum pc_di_vis_cull_mode val) in CP_DRAW_INDX_1_VIS_CULL() argument
279 return ((val) << CP_DRAW_INDX_1_VIS_CULL__SHIFT) & CP_DRAW_INDX_1_VIS_CULL__MASK; in CP_DRAW_INDX_1_VIS_CULL()
283 static inline uint32_t CP_DRAW_INDX_1_INDEX_SIZE(enum pc_di_index_size val) in CP_DRAW_INDX_1_INDEX_SIZE() argument
285 return ((val) << CP_DRAW_INDX_1_INDEX_SIZE__SHIFT) & CP_DRAW_INDX_1_INDEX_SIZE__MASK; in CP_DRAW_INDX_1_INDEX_SIZE()
292 static inline uint32_t CP_DRAW_INDX_1_NUM_INSTANCES(uint32_t val) in CP_DRAW_INDX_1_NUM_INSTANCES() argument
294 return ((val) << CP_DRAW_INDX_1_NUM_INSTANCES__SHIFT) & CP_DRAW_INDX_1_NUM_INSTANCES__MASK; in CP_DRAW_INDX_1_NUM_INSTANCES()
300 static inline uint32_t CP_DRAW_INDX_2_NUM_INDICES(uint32_t val) in CP_DRAW_INDX_2_NUM_INDICES() argument
302 return ((val) << CP_DRAW_INDX_2_NUM_INDICES__SHIFT) & CP_DRAW_INDX_2_NUM_INDICES__MASK; in CP_DRAW_INDX_2_NUM_INDICES()
308 static inline uint32_t CP_DRAW_INDX_3_INDX_BASE(uint32_t val) in CP_DRAW_INDX_3_INDX_BASE() argument
310 return ((val) << CP_DRAW_INDX_3_INDX_BASE__SHIFT) & CP_DRAW_INDX_3_INDX_BASE__MASK; in CP_DRAW_INDX_3_INDX_BASE()
316 static inline uint32_t CP_DRAW_INDX_4_INDX_SIZE(uint32_t val) in CP_DRAW_INDX_4_INDX_SIZE() argument
318 return ((val) << CP_DRAW_INDX_4_INDX_SIZE__SHIFT) & CP_DRAW_INDX_4_INDX_SIZE__MASK; in CP_DRAW_INDX_4_INDX_SIZE()
324 static inline uint32_t CP_DRAW_INDX_2_0_VIZ_QUERY(uint32_t val) in CP_DRAW_INDX_2_0_VIZ_QUERY() argument
326 return ((val) << CP_DRAW_INDX_2_0_VIZ_QUERY__SHIFT) & CP_DRAW_INDX_2_0_VIZ_QUERY__MASK; in CP_DRAW_INDX_2_0_VIZ_QUERY()
332 static inline uint32_t CP_DRAW_INDX_2_1_PRIM_TYPE(enum pc_di_primtype val) in CP_DRAW_INDX_2_1_PRIM_TYPE() argument
334 return ((val) << CP_DRAW_INDX_2_1_PRIM_TYPE__SHIFT) & CP_DRAW_INDX_2_1_PRIM_TYPE__MASK; in CP_DRAW_INDX_2_1_PRIM_TYPE()
338 static inline uint32_t CP_DRAW_INDX_2_1_SOURCE_SELECT(enum pc_di_src_sel val) in CP_DRAW_INDX_2_1_SOURCE_SELECT() argument
340 return ((val) << CP_DRAW_INDX_2_1_SOURCE_SELECT__SHIFT) & CP_DRAW_INDX_2_1_SOURCE_SELECT__MASK; in CP_DRAW_INDX_2_1_SOURCE_SELECT()
344 static inline uint32_t CP_DRAW_INDX_2_1_VIS_CULL(enum pc_di_vis_cull_mode val) in CP_DRAW_INDX_2_1_VIS_CULL() argument
346 return ((val) << CP_DRAW_INDX_2_1_VIS_CULL__SHIFT) & CP_DRAW_INDX_2_1_VIS_CULL__MASK; in CP_DRAW_INDX_2_1_VIS_CULL()
350 static inline uint32_t CP_DRAW_INDX_2_1_INDEX_SIZE(enum pc_di_index_size val) in CP_DRAW_INDX_2_1_INDEX_SIZE() argument
352 return ((val) << CP_DRAW_INDX_2_1_INDEX_SIZE__SHIFT) & CP_DRAW_INDX_2_1_INDEX_SIZE__MASK; in CP_DRAW_INDX_2_1_INDEX_SIZE()
359 static inline uint32_t CP_DRAW_INDX_2_1_NUM_INSTANCES(uint32_t val) in CP_DRAW_INDX_2_1_NUM_INSTANCES() argument
361 return ((val) << CP_DRAW_INDX_2_1_NUM_INSTANCES__SHIFT) & CP_DRAW_INDX_2_1_NUM_INSTANCES__MASK; in CP_DRAW_INDX_2_1_NUM_INSTANCES()
367 static inline uint32_t CP_DRAW_INDX_2_2_NUM_INDICES(uint32_t val) in CP_DRAW_INDX_2_2_NUM_INDICES() argument
369 return ((val) << CP_DRAW_INDX_2_2_NUM_INDICES__SHIFT) & CP_DRAW_INDX_2_2_NUM_INDICES__MASK; in CP_DRAW_INDX_2_2_NUM_INDICES()
375 static inline uint32_t CP_DRAW_INDX_OFFSET_0_PRIM_TYPE(enum pc_di_primtype val) in CP_DRAW_INDX_OFFSET_0_PRIM_TYPE() argument
377 return ((val) << CP_DRAW_INDX_OFFSET_0_PRIM_TYPE__SHIFT) & CP_DRAW_INDX_OFFSET_0_PRIM_TYPE__MASK; in CP_DRAW_INDX_OFFSET_0_PRIM_TYPE()
381 static inline uint32_t CP_DRAW_INDX_OFFSET_0_SOURCE_SELECT(enum pc_di_src_sel val) in CP_DRAW_INDX_OFFSET_0_SOURCE_SELECT() argument
383 …return ((val) << CP_DRAW_INDX_OFFSET_0_SOURCE_SELECT__SHIFT) & CP_DRAW_INDX_OFFSET_0_SOURCE_SELECT… in CP_DRAW_INDX_OFFSET_0_SOURCE_SELECT()
387 static inline uint32_t CP_DRAW_INDX_OFFSET_0_INDEX_SIZE(enum a4xx_index_size val) in CP_DRAW_INDX_OFFSET_0_INDEX_SIZE() argument
389 return ((val) << CP_DRAW_INDX_OFFSET_0_INDEX_SIZE__SHIFT) & CP_DRAW_INDX_OFFSET_0_INDEX_SIZE__MASK; in CP_DRAW_INDX_OFFSET_0_INDEX_SIZE()
395 static inline uint32_t CP_DRAW_INDX_OFFSET_1_NUM_INSTANCES(uint32_t val) in CP_DRAW_INDX_OFFSET_1_NUM_INSTANCES() argument
397 …return ((val) << CP_DRAW_INDX_OFFSET_1_NUM_INSTANCES__SHIFT) & CP_DRAW_INDX_OFFSET_1_NUM_INSTANCES… in CP_DRAW_INDX_OFFSET_1_NUM_INSTANCES()
403 static inline uint32_t CP_DRAW_INDX_OFFSET_2_NUM_INDICES(uint32_t val) in CP_DRAW_INDX_OFFSET_2_NUM_INDICES() argument
405 …return ((val) << CP_DRAW_INDX_OFFSET_2_NUM_INDICES__SHIFT) & CP_DRAW_INDX_OFFSET_2_NUM_INDICES__MA… in CP_DRAW_INDX_OFFSET_2_NUM_INDICES()
413 static inline uint32_t CP_DRAW_INDX_OFFSET_4_INDX_BASE(uint32_t val) in CP_DRAW_INDX_OFFSET_4_INDX_BASE() argument
415 return ((val) << CP_DRAW_INDX_OFFSET_4_INDX_BASE__SHIFT) & CP_DRAW_INDX_OFFSET_4_INDX_BASE__MASK; in CP_DRAW_INDX_OFFSET_4_INDX_BASE()
421 static inline uint32_t CP_DRAW_INDX_OFFSET_5_INDX_SIZE(uint32_t val) in CP_DRAW_INDX_OFFSET_5_INDX_SIZE() argument
423 return ((val) << CP_DRAW_INDX_OFFSET_5_INDX_SIZE__SHIFT) & CP_DRAW_INDX_OFFSET_5_INDX_SIZE__MASK; in CP_DRAW_INDX_OFFSET_5_INDX_SIZE()
429 static inline uint32_t CP_SET_DRAW_STATE_0_COUNT(uint32_t val) in CP_SET_DRAW_STATE_0_COUNT() argument
431 return ((val) << CP_SET_DRAW_STATE_0_COUNT__SHIFT) & CP_SET_DRAW_STATE_0_COUNT__MASK; in CP_SET_DRAW_STATE_0_COUNT()
439 static inline uint32_t CP_SET_DRAW_STATE_0_GROUP_ID(uint32_t val) in CP_SET_DRAW_STATE_0_GROUP_ID() argument
441 return ((val) << CP_SET_DRAW_STATE_0_GROUP_ID__SHIFT) & CP_SET_DRAW_STATE_0_GROUP_ID__MASK; in CP_SET_DRAW_STATE_0_GROUP_ID()
447 static inline uint32_t CP_SET_DRAW_STATE_1_ADDR(uint32_t val) in CP_SET_DRAW_STATE_1_ADDR() argument
449 return ((val) << CP_SET_DRAW_STATE_1_ADDR__SHIFT) & CP_SET_DRAW_STATE_1_ADDR__MASK; in CP_SET_DRAW_STATE_1_ADDR()
457 static inline uint32_t CP_SET_BIN_1_X1(uint32_t val) in CP_SET_BIN_1_X1() argument
459 return ((val) << CP_SET_BIN_1_X1__SHIFT) & CP_SET_BIN_1_X1__MASK; in CP_SET_BIN_1_X1()
463 static inline uint32_t CP_SET_BIN_1_Y1(uint32_t val) in CP_SET_BIN_1_Y1() argument
465 return ((val) << CP_SET_BIN_1_Y1__SHIFT) & CP_SET_BIN_1_Y1__MASK; in CP_SET_BIN_1_Y1()
471 static inline uint32_t CP_SET_BIN_2_X2(uint32_t val) in CP_SET_BIN_2_X2() argument
473 return ((val) << CP_SET_BIN_2_X2__SHIFT) & CP_SET_BIN_2_X2__MASK; in CP_SET_BIN_2_X2()
477 static inline uint32_t CP_SET_BIN_2_Y2(uint32_t val) in CP_SET_BIN_2_Y2() argument
479 return ((val) << CP_SET_BIN_2_Y2__SHIFT) & CP_SET_BIN_2_Y2__MASK; in CP_SET_BIN_2_Y2()
485 static inline uint32_t CP_SET_BIN_DATA_0_BIN_DATA_ADDR(uint32_t val) in CP_SET_BIN_DATA_0_BIN_DATA_ADDR() argument
487 return ((val) << CP_SET_BIN_DATA_0_BIN_DATA_ADDR__SHIFT) & CP_SET_BIN_DATA_0_BIN_DATA_ADDR__MASK; in CP_SET_BIN_DATA_0_BIN_DATA_ADDR()
493 static inline uint32_t CP_SET_BIN_DATA_1_BIN_SIZE_ADDRESS(uint32_t val) in CP_SET_BIN_DATA_1_BIN_SIZE_ADDRESS() argument
495 …return ((val) << CP_SET_BIN_DATA_1_BIN_SIZE_ADDRESS__SHIFT) & CP_SET_BIN_DATA_1_BIN_SIZE_ADDRESS__… in CP_SET_BIN_DATA_1_BIN_SIZE_ADDRESS()