Lines Matching refs:i1

247 …2_t REG_MDP5_MDP_SMP_ALLOC_W(uint32_t i0, uint32_t i1) { return 0x00000080 + __offset_MDP(i0) + 0x…  in REG_MDP5_MDP_SMP_ALLOC_W()  argument
249 …REG_MDP5_MDP_SMP_ALLOC_W_REG(uint32_t i0, uint32_t i1) { return 0x00000080 + __offset_MDP(i0) + 0x… in REG_MDP5_MDP_SMP_ALLOC_W_REG() argument
269 …2_t REG_MDP5_MDP_SMP_ALLOC_R(uint32_t i0, uint32_t i1) { return 0x00000130 + __offset_MDP(i0) + 0x… in REG_MDP5_MDP_SMP_ALLOC_R() argument
271 …REG_MDP5_MDP_SMP_ALLOC_R_REG(uint32_t i0, uint32_t i1) { return 0x00000130 + __offset_MDP(i0) + 0x… in REG_MDP5_MDP_SMP_ALLOC_R_REG() argument
301 …_MDP5_MDP_IGC(uint32_t i0, enum mdp5_igc_type i1) { return 0x00000000 + __offset_MDP(i0) + __offse… in REG_MDP5_MDP_IGC() argument
303 …IGC_LUT(uint32_t i0, enum mdp5_igc_type i1, uint32_t i2) { return 0x00000000 + __offset_MDP(i0) + … in REG_MDP5_MDP_IGC_LUT() argument
305 …LUT_REG(uint32_t i0, enum mdp5_igc_type i1, uint32_t i2) { return 0x00000000 + __offset_MDP(i0) + … in REG_MDP5_MDP_IGC_LUT_REG() argument
356 …2_t REG_MDP5_CTL_LAYER(uint32_t i0, uint32_t i1) { return 0x00000000 + __offset_CTL(i0) + __offset… in REG_MDP5_CTL_LAYER() argument
358 …REG_MDP5_CTL_LAYER_REG(uint32_t i0, uint32_t i1) { return 0x00000000 + __offset_CTL(i0) + __offset… in REG_MDP5_CTL_LAYER_REG() argument
582 …_PIPE_CSC_1_PRE_CLAMP(enum mdp5_pipe i0, uint32_t i1) { return 0x00000334 + __offset_PIPE(i0) + 0x… in REG_MDP5_PIPE_CSC_1_PRE_CLAMP() argument
584 …E_CSC_1_PRE_CLAMP_REG(enum mdp5_pipe i0, uint32_t i1) { return 0x00000334 + __offset_PIPE(i0) + 0x… in REG_MDP5_PIPE_CSC_1_PRE_CLAMP_REG() argument
598 …PIPE_CSC_1_POST_CLAMP(enum mdp5_pipe i0, uint32_t i1) { return 0x00000340 + __offset_PIPE(i0) + 0x… in REG_MDP5_PIPE_CSC_1_POST_CLAMP() argument
600 …_CSC_1_POST_CLAMP_REG(enum mdp5_pipe i0, uint32_t i1) { return 0x00000340 + __offset_PIPE(i0) + 0x… in REG_MDP5_PIPE_CSC_1_POST_CLAMP_REG() argument
614 …5_PIPE_CSC_1_PRE_BIAS(enum mdp5_pipe i0, uint32_t i1) { return 0x0000034c + __offset_PIPE(i0) + 0x… in REG_MDP5_PIPE_CSC_1_PRE_BIAS() argument
616 …PE_CSC_1_PRE_BIAS_REG(enum mdp5_pipe i0, uint32_t i1) { return 0x0000034c + __offset_PIPE(i0) + 0x… in REG_MDP5_PIPE_CSC_1_PRE_BIAS_REG() argument
624 …_PIPE_CSC_1_POST_BIAS(enum mdp5_pipe i0, uint32_t i1) { return 0x00000358 + __offset_PIPE(i0) + 0x… in REG_MDP5_PIPE_CSC_1_POST_BIAS() argument
626 …E_CSC_1_POST_BIAS_REG(enum mdp5_pipe i0, uint32_t i1) { return 0x00000358 + __offset_PIPE(i0) + 0x… in REG_MDP5_PIPE_CSC_1_POST_BIAS_REG() argument
964 …e uint32_t REG_MDP5_LM_BLEND(uint32_t i0, uint32_t i1) { return 0x00000020 + __offset_LM(i0) + 0x3… in REG_MDP5_LM_BLEND() argument
966 …_t REG_MDP5_LM_BLEND_OP_MODE(uint32_t i0, uint32_t i1) { return 0x00000020 + __offset_LM(i0) + 0x3… in REG_MDP5_LM_BLEND_OP_MODE() argument
988 …t REG_MDP5_LM_BLEND_FG_ALPHA(uint32_t i0, uint32_t i1) { return 0x00000024 + __offset_LM(i0) + 0x3… in REG_MDP5_LM_BLEND_FG_ALPHA() argument
990 …t REG_MDP5_LM_BLEND_BG_ALPHA(uint32_t i0, uint32_t i1) { return 0x00000028 + __offset_LM(i0) + 0x3… in REG_MDP5_LM_BLEND_BG_ALPHA() argument
992 …MDP5_LM_BLEND_FG_TRANSP_LOW0(uint32_t i0, uint32_t i1) { return 0x0000002c + __offset_LM(i0) + 0x3… in REG_MDP5_LM_BLEND_FG_TRANSP_LOW0() argument
994 …MDP5_LM_BLEND_FG_TRANSP_LOW1(uint32_t i0, uint32_t i1) { return 0x00000030 + __offset_LM(i0) + 0x3… in REG_MDP5_LM_BLEND_FG_TRANSP_LOW1() argument
996 …DP5_LM_BLEND_FG_TRANSP_HIGH0(uint32_t i0, uint32_t i1) { return 0x00000034 + __offset_LM(i0) + 0x3… in REG_MDP5_LM_BLEND_FG_TRANSP_HIGH0() argument
998 …DP5_LM_BLEND_FG_TRANSP_HIGH1(uint32_t i0, uint32_t i1) { return 0x00000038 + __offset_LM(i0) + 0x3… in REG_MDP5_LM_BLEND_FG_TRANSP_HIGH1() argument
1000 …MDP5_LM_BLEND_BG_TRANSP_LOW0(uint32_t i0, uint32_t i1) { return 0x0000003c + __offset_LM(i0) + 0x3… in REG_MDP5_LM_BLEND_BG_TRANSP_LOW0() argument
1002 …MDP5_LM_BLEND_BG_TRANSP_LOW1(uint32_t i0, uint32_t i1) { return 0x00000040 + __offset_LM(i0) + 0x3… in REG_MDP5_LM_BLEND_BG_TRANSP_LOW1() argument
1004 …DP5_LM_BLEND_BG_TRANSP_HIGH0(uint32_t i0, uint32_t i1) { return 0x00000044 + __offset_LM(i0) + 0x3… in REG_MDP5_LM_BLEND_BG_TRANSP_HIGH0() argument
1006 …DP5_LM_BLEND_BG_TRANSP_HIGH1(uint32_t i0, uint32_t i1) { return 0x00000048 + __offset_LM(i0) + 0x3… in REG_MDP5_LM_BLEND_BG_TRANSP_HIGH1() argument