49 	struct nv50_disp_priv *priv = container_of(event, typeof(*priv), uevent);  in gf110_disp_chan_uevent_fini()  local
50 	nv_mask(priv, 0x610090, 0x00000001 << index, 0x00000000 << index);  in gf110_disp_chan_uevent_fini()
51 	nv_wr32(priv, 0x61008c, 0x00000001 << index);  in gf110_disp_chan_uevent_fini()
57 	struct nv50_disp_priv *priv = container_of(event, typeof(*priv), uevent);  in gf110_disp_chan_uevent_init()  local
58 	nv_wr32(priv, 0x61008c, 0x00000001 << index);  in gf110_disp_chan_uevent_init()
59 	nv_mask(priv, 0x610090, 0x00000001 << index, 0x00000001 << index);  in gf110_disp_chan_uevent_init()
94 	struct nv50_disp_priv *priv = (void *)object->engine;  in gf110_disp_dmac_init()  local
104 	nv_mask(priv, 0x6100a0, 0x00000001 << chid, 0x00000001 << chid);  in gf110_disp_dmac_init()
107 	nv_wr32(priv, 0x610494 + (chid * 0x0010), dmac->push);  in gf110_disp_dmac_init()
108 	nv_wr32(priv, 0x610498 + (chid * 0x0010), 0x00010000);  in gf110_disp_dmac_init()
109 	nv_wr32(priv, 0x61049c + (chid * 0x0010), 0x00000001);  in gf110_disp_dmac_init()
110 	nv_mask(priv, 0x610490 + (chid * 0x0010), 0x00000010, 0x00000010);  in gf110_disp_dmac_init()
111 	nv_wr32(priv, 0x640000 + (chid * 0x1000), 0x00000000);  in gf110_disp_dmac_init()
112 	nv_wr32(priv, 0x610490 + (chid * 0x0010), 0x00000013);  in gf110_disp_dmac_init()
115 	if (!nv_wait(priv, 0x610490 + (chid * 0x10), 0x80000000, 0x00000000)) {  in gf110_disp_dmac_init()
117 			 nv_rd32(priv, 0x610490 + (chid * 0x10)));  in gf110_disp_dmac_init()
127 	struct nv50_disp_priv *priv = (void *)object->engine;  in gf110_disp_dmac_fini()  local
132 	nv_mask(priv, 0x610490 + (chid * 0x0010), 0x00001010, 0x00001000);  in gf110_disp_dmac_fini()
133 	nv_mask(priv, 0x610490 + (chid * 0x0010), 0x00000003, 0x00000000);  in gf110_disp_dmac_fini()
134 	if (!nv_wait(priv, 0x610490 + (chid * 0x10), 0x001e0000, 0x00000000)) {  in gf110_disp_dmac_fini()
136 			 nv_rd32(priv, 0x610490 + (chid * 0x10)));  in gf110_disp_dmac_fini()
142 	nv_mask(priv, 0x610090, 0x00000001 << chid, 0x00000000);  in gf110_disp_dmac_fini()
143 	nv_mask(priv, 0x6100a0, 0x00000001 << chid, 0x00000000);  in gf110_disp_dmac_fini()
295 	struct nv50_disp_priv *priv = (void *)object->engine;  in gf110_disp_core_init()  local
304 	nv_mask(priv, 0x6100a0, 0x00000001, 0x00000001);  in gf110_disp_core_init()
307 	nv_wr32(priv, 0x610494, mast->push);  in gf110_disp_core_init()
308 	nv_wr32(priv, 0x610498, 0x00010000);  in gf110_disp_core_init()
309 	nv_wr32(priv, 0x61049c, 0x00000001);  in gf110_disp_core_init()
310 	nv_mask(priv, 0x610490, 0x00000010, 0x00000010);  in gf110_disp_core_init()
311 	nv_wr32(priv, 0x640000, 0x00000000);  in gf110_disp_core_init()
312 	nv_wr32(priv, 0x610490, 0x01000013);  in gf110_disp_core_init()
315 	if (!nv_wait(priv, 0x610490, 0x80000000, 0x00000000)) {  in gf110_disp_core_init()
316 		nv_error(mast, "init: 0x%08x\n", nv_rd32(priv, 0x610490));  in gf110_disp_core_init()
326 	struct nv50_disp_priv *priv = (void *)object->engine;  in gf110_disp_core_fini()  local
330 	nv_mask(priv, 0x610490, 0x00000010, 0x00000000);  in gf110_disp_core_fini()
331 	nv_mask(priv, 0x610490, 0x00000003, 0x00000000);  in gf110_disp_core_fini()
332 	if (!nv_wait(priv, 0x610490, 0x001e0000, 0x00000000)) {  in gf110_disp_core_fini()
333 		nv_error(mast, "fini: 0x%08x\n", nv_rd32(priv, 0x610490));  in gf110_disp_core_fini()
339 	nv_mask(priv, 0x610090, 0x00000001, 0x00000000);  in gf110_disp_core_fini()
340 	nv_mask(priv, 0x6100a0, 0x00000001, 0x00000000);  in gf110_disp_core_fini()
542 	struct nv50_disp_priv *priv = (void *)object->engine;  in gf110_disp_pioc_init()  local
552 	nv_mask(priv, 0x6100a0, 0x00000001 << chid, 0x00000001 << chid);  in gf110_disp_pioc_init()
555 	nv_wr32(priv, 0x610490 + (chid * 0x10), 0x00000001);  in gf110_disp_pioc_init()
556 	if (!nv_wait(priv, 0x610490 + (chid * 0x10), 0x00030000, 0x00010000)) {  in gf110_disp_pioc_init()
558 			 nv_rd32(priv, 0x610490 + (chid * 0x10)));  in gf110_disp_pioc_init()
568 	struct nv50_disp_priv *priv = (void *)object->engine;  in gf110_disp_pioc_fini()  local
572 	nv_mask(priv, 0x610490 + (chid * 0x10), 0x00000001, 0x00000000);  in gf110_disp_pioc_fini()
573 	if (!nv_wait(priv, 0x610490 + (chid * 0x10), 0x00030000, 0x00000000)) {  in gf110_disp_pioc_fini()
575 			 nv_rd32(priv, 0x610490 + (chid * 0x10)));  in gf110_disp_pioc_fini()
581 	nv_mask(priv, 0x610090, 0x00000001 << chid, 0x00000000);  in gf110_disp_pioc_fini()
582 	nv_mask(priv, 0x6100a0, 0x00000001 << chid, 0x00000000);  in gf110_disp_pioc_fini()
628 	const u32 total  = nv_rd32(priv, 0x640414 + (head * 0x300));  in gf110_disp_main_scanoutpos()
629 	const u32 blanke = nv_rd32(priv, 0x64041c + (head * 0x300));  in gf110_disp_main_scanoutpos()
630 	const u32 blanks = nv_rd32(priv, 0x640420 + (head * 0x300));  in gf110_disp_main_scanoutpos()
647 			nv_rd32(priv, 0x616340 + (head * 0x800)) & 0xffff;  in gf110_disp_main_scanoutpos()
650 			nv_rd32(priv, 0x616344 + (head * 0x800)) & 0xffff;  in gf110_disp_main_scanoutpos()
660 	struct nv50_disp_priv *priv = (void *)object->engine;  in gf110_disp_main_init()  local
675 	for (i = 0; i < priv->head.nr; i++) {  in gf110_disp_main_init()
676 		tmp = nv_rd32(priv, 0x616104 + (i * 0x800));  in gf110_disp_main_init()
677 		nv_wr32(priv, 0x6101b4 + (i * 0x800), tmp);  in gf110_disp_main_init()
678 		tmp = nv_rd32(priv, 0x616108 + (i * 0x800));  in gf110_disp_main_init()
679 		nv_wr32(priv, 0x6101b8 + (i * 0x800), tmp);  in gf110_disp_main_init()
680 		tmp = nv_rd32(priv, 0x61610c + (i * 0x800));  in gf110_disp_main_init()
681 		nv_wr32(priv, 0x6101bc + (i * 0x800), tmp);  in gf110_disp_main_init()
685 	for (i = 0; i < priv->dac.nr; i++) {  in gf110_disp_main_init()
686 		tmp = nv_rd32(priv, 0x61a000 + (i * 0x800));  in gf110_disp_main_init()
687 		nv_wr32(priv, 0x6101c0 + (i * 0x800), tmp);  in gf110_disp_main_init()
691 	for (i = 0; i < priv->sor.nr; i++) {  in gf110_disp_main_init()
692 		tmp = nv_rd32(priv, 0x61c000 + (i * 0x800));  in gf110_disp_main_init()
693 		nv_wr32(priv, 0x6301c4 + (i * 0x800), tmp);  in gf110_disp_main_init()
697 	if (nv_rd32(priv, 0x6100ac) & 0x00000100) {  in gf110_disp_main_init()
698 		nv_wr32(priv, 0x6100ac, 0x00000100);  in gf110_disp_main_init()
699 		nv_mask(priv, 0x6194e8, 0x00000001, 0x00000000);  in gf110_disp_main_init()
700 		if (!nv_wait(priv, 0x6194e8, 0x00000002, 0x00000000)) {  in gf110_disp_main_init()
701 			nv_error(priv, "timeout acquiring display\n");  in gf110_disp_main_init()
707 	nv_wr32(priv, 0x610010, (nv_gpuobj(object->parent)->addr >> 8) | 9);  in gf110_disp_main_init()
710 	nv_wr32(priv, 0x610090, 0x00000000);  in gf110_disp_main_init()
711 	nv_wr32(priv, 0x6100a0, 0x00000000);  in gf110_disp_main_init()
712 	nv_wr32(priv, 0x6100b0, 0x00000307);  in gf110_disp_main_init()
720 	for (i = 0; i < priv->head.nr; i++)  in gf110_disp_main_init()
721 		nv_mask(priv, 0x616308 + (i * 0x800), 0x00000111, 0x00000010);  in gf110_disp_main_init()
729 	struct nv50_disp_priv *priv = (void *)object->engine;  in gf110_disp_main_fini()  local
733 	nv_wr32(priv, 0x6100b0, 0x00000000);  in gf110_disp_main_fini()
790 exec_lookup(struct nv50_disp_priv *priv, int head, int or, u32 ctrl,  in exec_lookup()  argument
794 	struct nvkm_bios *bios = nvkm_bios(priv);  in exec_lookup()
811 			nv_error(priv, "unknown SOR mc 0x%08x\n", ctrl);  in exec_lookup()
820 	list_for_each_entry(outp, &priv->base.outp, head) {  in exec_lookup()
836 exec_script(struct nv50_disp_priv *priv, int head, int id)  in exec_script()  argument
838 	struct nvkm_bios *bios = nvkm_bios(priv);  in exec_script()
846 		ctrl = nv_rd32(priv, 0x640180 + (or * 0x20));  in exec_script()
854 	outp = exec_lookup(priv, head, or, ctrl, &data, &ver, &hdr, &cnt, &len, &info);  in exec_script()
857 			.subdev = nv_subdev(priv),  in exec_script()
872 exec_clkcmp(struct nv50_disp_priv *priv, int head, int id, u32 pclk, u32 *conf)  in exec_clkcmp()  argument
874 	struct nvkm_bios *bios = nvkm_bios(priv);  in exec_clkcmp()
883 		ctrl = nv_rd32(priv, 0x660180 + (or * 0x20));  in exec_clkcmp()
891 	outp = exec_lookup(priv, head, or, ctrl, &data, &ver, &hdr, &cnt, &len, &info1);  in exec_clkcmp()
902 		*conf = priv->sor.lvdsconf;  in exec_clkcmp()
918 				.subdev = nv_subdev(priv),  in exec_clkcmp()
934 gf110_disp_intr_unk1_0(struct nv50_disp_priv *priv, int head)  in gf110_disp_intr_unk1_0()  argument
936 	exec_script(priv, head, 1);  in gf110_disp_intr_unk1_0()
940 gf110_disp_intr_unk2_0(struct nv50_disp_priv *priv, int head)  in gf110_disp_intr_unk2_0()  argument
942 	struct nvkm_output *outp = exec_script(priv, head, 2);  in gf110_disp_intr_unk2_0()
948 			.subdev = nv_subdev(priv),  in gf110_disp_intr_unk2_0()
949 			.bios = nvkm_bios(priv),  in gf110_disp_intr_unk2_0()
962 gf110_disp_intr_unk2_1(struct nv50_disp_priv *priv, int head)  in gf110_disp_intr_unk2_1()  argument
964 	struct nvkm_devinit *devinit = nvkm_devinit(priv);  in gf110_disp_intr_unk2_1()
965 	u32 pclk = nv_rd32(priv, 0x660450 + (head * 0x300)) / 1000;  in gf110_disp_intr_unk2_1()
968 	nv_wr32(priv, 0x612200 + (head * 0x800), 0x00000000);  in gf110_disp_intr_unk2_1()
972 gf110_disp_intr_unk2_2_tu(struct nv50_disp_priv *priv, int head,  in gf110_disp_intr_unk2_2_tu()  argument
976 	const u32 ctrl = nv_rd32(priv, 0x660200 + (or   * 0x020));  in gf110_disp_intr_unk2_2_tu()
977 	const u32 conf = nv_rd32(priv, 0x660404 + (head * 0x300));  in gf110_disp_intr_unk2_2_tu()
978 	const s32 vactive = nv_rd32(priv, 0x660414 + (head * 0x300)) & 0xffff;  in gf110_disp_intr_unk2_2_tu()
979 	const s32 vblanke = nv_rd32(priv, 0x66041c + (head * 0x300)) & 0xffff;  in gf110_disp_intr_unk2_2_tu()
980 	const s32 vblanks = nv_rd32(priv, 0x660420 + (head * 0x300)) & 0xffff;  in gf110_disp_intr_unk2_2_tu()
981 	const u32 pclk = nv_rd32(priv, 0x660450 + (head * 0x300)) / 1000;  in gf110_disp_intr_unk2_2_tu()
988 	u32 dpctrl = nv_rd32(priv, 0x61c10c + loff);  in gf110_disp_intr_unk2_2_tu()
989 	u32 clksor = nv_rd32(priv, 0x612300 + soff);  in gf110_disp_intr_unk2_2_tu()
1002 	nv_mask(priv, 0x616620 + hoff, 0x0000ffff, value);  in gf110_disp_intr_unk2_2_tu()
1009 	nv_mask(priv, 0x616624 + hoff, 0x00ffffff, value);  in gf110_disp_intr_unk2_2_tu()
1029 	nv_wr32(priv, 0x616610 + hoff, value);  in gf110_disp_intr_unk2_2_tu()
1033 gf110_disp_intr_unk2_2(struct nv50_disp_priv *priv, int head)  in gf110_disp_intr_unk2_2()  argument
1036 	u32 pclk = nv_rd32(priv, 0x660450 + (head * 0x300)) / 1000;  in gf110_disp_intr_unk2_2()
1039 	outp = exec_clkcmp(priv, head, 0xff, pclk, &conf);  in gf110_disp_intr_unk2_2()
1045 		u32 sync = nv_rd32(priv, 0x660404 + (head * 0x300));  in gf110_disp_intr_unk2_2()
1058 		if (priv->sor.magic)  in gf110_disp_intr_unk2_2()
1059 			priv->sor.magic(outp);  in gf110_disp_intr_unk2_2()
1062 	exec_clkcmp(priv, head, 0, pclk, &conf);  in gf110_disp_intr_unk2_2()
1072 			nv_mask(priv, addr, 0x007c0000, 0x00280000);  in gf110_disp_intr_unk2_2()
1075 			gf110_disp_intr_unk2_2_tu(priv, head, &outp->info);  in gf110_disp_intr_unk2_2()
1082 	nv_mask(priv, addr, 0x00000707, data);  in gf110_disp_intr_unk2_2()
1086 gf110_disp_intr_unk4_0(struct nv50_disp_priv *priv, int head)  in gf110_disp_intr_unk4_0()  argument
1088 	u32 pclk = nv_rd32(priv, 0x660450 + (head * 0x300)) / 1000;  in gf110_disp_intr_unk4_0()
1091 	exec_clkcmp(priv, head, 1, pclk, &conf);  in gf110_disp_intr_unk4_0()
1097 	struct nv50_disp_priv *priv =  in gf110_disp_intr_supervisor()  local
1099 	struct nv50_disp_impl *impl = (void *)nv_object(priv)->oclass;  in gf110_disp_intr_supervisor()
1103 	nv_debug(priv, "supervisor %d\n", ffs(priv->super));  in gf110_disp_intr_supervisor()
1104 	for (head = 0; head < priv->head.nr; head++) {  in gf110_disp_intr_supervisor()
1105 		mask[head] = nv_rd32(priv, 0x6101d4 + (head * 0x800));  in gf110_disp_intr_supervisor()
1106 		nv_debug(priv, "head %d: 0x%08x\n", head, mask[head]);  in gf110_disp_intr_supervisor()
1109 	if (priv->super & 0x00000001) {  in gf110_disp_intr_supervisor()
1110 		nv50_disp_mthd_chan(priv, NV_DBG_DEBUG, 0, impl->mthd.core);  in gf110_disp_intr_supervisor()
1111 		for (head = 0; head < priv->head.nr; head++) {  in gf110_disp_intr_supervisor()
1114 			nv_debug(priv, "supervisor 1.0 - head %d\n", head);  in gf110_disp_intr_supervisor()
1115 			gf110_disp_intr_unk1_0(priv, head);  in gf110_disp_intr_supervisor()
1118 	if (priv->super & 0x00000002) {  in gf110_disp_intr_supervisor()
1119 		for (head = 0; head < priv->head.nr; head++) {  in gf110_disp_intr_supervisor()
1122 			nv_debug(priv, "supervisor 2.0 - head %d\n", head);  in gf110_disp_intr_supervisor()
1123 			gf110_disp_intr_unk2_0(priv, head);  in gf110_disp_intr_supervisor()
1125 		for (head = 0; head < priv->head.nr; head++) {  in gf110_disp_intr_supervisor()
1128 			nv_debug(priv, "supervisor 2.1 - head %d\n", head);  in gf110_disp_intr_supervisor()
1129 			gf110_disp_intr_unk2_1(priv, head);  in gf110_disp_intr_supervisor()
1131 		for (head = 0; head < priv->head.nr; head++) {  in gf110_disp_intr_supervisor()
1134 			nv_debug(priv, "supervisor 2.2 - head %d\n", head);  in gf110_disp_intr_supervisor()
1135 			gf110_disp_intr_unk2_2(priv, head);  in gf110_disp_intr_supervisor()
1138 	if (priv->super & 0x00000004) {  in gf110_disp_intr_supervisor()
1139 		for (head = 0; head < priv->head.nr; head++) {  in gf110_disp_intr_supervisor()
1142 			nv_debug(priv, "supervisor 3.0 - head %d\n", head);  in gf110_disp_intr_supervisor()
1143 			gf110_disp_intr_unk4_0(priv, head);  in gf110_disp_intr_supervisor()
1147 	for (head = 0; head < priv->head.nr; head++)  in gf110_disp_intr_supervisor()
1148 		nv_wr32(priv, 0x6101d4 + (head * 0x800), 0x00000000);  in gf110_disp_intr_supervisor()
1149 	nv_wr32(priv, 0x6101d0, 0x80000000);  in gf110_disp_intr_supervisor()
1153 gf110_disp_intr_error(struct nv50_disp_priv *priv, int chid)  in gf110_disp_intr_error()  argument
1155 	const struct nv50_disp_impl *impl = (void *)nv_object(priv)->oclass;  in gf110_disp_intr_error()
1156 	u32 mthd = nv_rd32(priv, 0x6101f0 + (chid * 12));  in gf110_disp_intr_error()
1157 	u32 data = nv_rd32(priv, 0x6101f4 + (chid * 12));  in gf110_disp_intr_error()
1158 	u32 unkn = nv_rd32(priv, 0x6101f8 + (chid * 12));  in gf110_disp_intr_error()
1160 	nv_error(priv, "chid %d mthd 0x%04x data 0x%08x "  in gf110_disp_intr_error()
1167 			nv50_disp_mthd_chan(priv, NV_DBG_ERROR, chid - 0,  in gf110_disp_intr_error()
1177 			nv50_disp_mthd_chan(priv, NV_DBG_ERROR, chid - 1,  in gf110_disp_intr_error()
1187 			nv50_disp_mthd_chan(priv, NV_DBG_ERROR, chid - 5,  in gf110_disp_intr_error()
1195 	nv_wr32(priv, 0x61009c, (1 << chid));  in gf110_disp_intr_error()
1196 	nv_wr32(priv, 0x6101f0 + (chid * 12), 0x90000000);  in gf110_disp_intr_error()
1202 	struct nv50_disp_priv *priv = (void *)subdev;  in gf110_disp_intr()  local
1203 	u32 intr = nv_rd32(priv, 0x610088);  in gf110_disp_intr()
1207 		u32 stat = nv_rd32(priv, 0x61008c);  in gf110_disp_intr()
1210 			nv50_disp_chan_uevent_send(priv, chid);  in gf110_disp_intr()
1211 			nv_wr32(priv, 0x61008c, 1 << chid);  in gf110_disp_intr()
1217 		u32 stat = nv_rd32(priv, 0x61009c);  in gf110_disp_intr()
1220 			gf110_disp_intr_error(priv, chid);  in gf110_disp_intr()
1225 		u32 stat = nv_rd32(priv, 0x6100ac);  in gf110_disp_intr()
1227 			priv->super = (stat & 0x00000007);  in gf110_disp_intr()
1228 			schedule_work(&priv->supervisor);  in gf110_disp_intr()
1229 			nv_wr32(priv, 0x6100ac, priv->super);  in gf110_disp_intr()
1234 			nv_info(priv, "unknown intr24 0x%08x\n", stat);  in gf110_disp_intr()
1235 			nv_wr32(priv, 0x6100ac, stat);  in gf110_disp_intr()
1241 	for (i = 0; i < priv->head.nr; i++) {  in gf110_disp_intr()
1244 			u32 stat = nv_rd32(priv, 0x6100bc + (i * 0x800));  in gf110_disp_intr()
1246 				nvkm_disp_vblank(&priv->base, i);  in gf110_disp_intr()
1247 			nv_mask(priv, 0x6100bc + (i * 0x800), 0, 0);  in gf110_disp_intr()
1248 			nv_rd32(priv, 0x6100c0 + (i * 0x800));  in gf110_disp_intr()
1258 	struct nv50_disp_priv *priv;  in gf110_disp_ctor()  local
1263 			       "PDISP", "display", &priv);  in gf110_disp_ctor()
1264 	*pobject = nv_object(priv);  in gf110_disp_ctor()
1268 	ret = nvkm_event_init(&gf110_disp_chan_uevent, 1, 17, &priv->uevent);  in gf110_disp_ctor()
1272 	nv_engine(priv)->sclass = gf110_disp_main_oclass;  in gf110_disp_ctor()
1273 	nv_engine(priv)->cclass = &nv50_disp_cclass;  in gf110_disp_ctor()
1274 	nv_subdev(priv)->intr = gf110_disp_intr;  in gf110_disp_ctor()
1275 	INIT_WORK(&priv->supervisor, gf110_disp_intr_supervisor);  in gf110_disp_ctor()
1276 	priv->sclass = gf110_disp_sclass;  in gf110_disp_ctor()
1277 	priv->head.nr = heads;  in gf110_disp_ctor()
1278 	priv->dac.nr = 3;  in gf110_disp_ctor()
1279 	priv->sor.nr = 4;  in gf110_disp_ctor()
1280 	priv->dac.power = nv50_dac_power;  in gf110_disp_ctor()
1281 	priv->dac.sense = nv50_dac_sense;  in gf110_disp_ctor()
1282 	priv->sor.power = nv50_sor_power;  in gf110_disp_ctor()
1283 	priv->sor.hda_eld = gf110_hda_eld;  in gf110_disp_ctor()
1284 	priv->sor.hdmi = gf110_hdmi_ctrl;  in gf110_disp_ctor()