35 	const u32 soff = outp->or * 0x800;  in gt215_hdmi_ctrl()  local
58 		nv_mask(priv, 0x61c5a4 + soff, 0x40000000, 0x00000000);  in gt215_hdmi_ctrl()
59 		nv_mask(priv, 0x61c520 + soff, 0x00000001, 0x00000000);  in gt215_hdmi_ctrl()
60 		nv_mask(priv, 0x61c500 + soff, 0x00000001, 0x00000000);  in gt215_hdmi_ctrl()
65 	nv_mask(priv, 0x61c520 + soff, 0x00000001, 0x00000000);  in gt215_hdmi_ctrl()
66 	nv_wr32(priv, 0x61c528 + soff, 0x000d0282);  in gt215_hdmi_ctrl()
67 	nv_wr32(priv, 0x61c52c + soff, 0x0000006f);  in gt215_hdmi_ctrl()
68 	nv_wr32(priv, 0x61c530 + soff, 0x00000000);  in gt215_hdmi_ctrl()
69 	nv_wr32(priv, 0x61c534 + soff, 0x00000000);  in gt215_hdmi_ctrl()
70 	nv_wr32(priv, 0x61c538 + soff, 0x00000000);  in gt215_hdmi_ctrl()
71 	nv_mask(priv, 0x61c520 + soff, 0x00000001, 0x00000001);  in gt215_hdmi_ctrl()
74 	nv_mask(priv, 0x61c500 + soff, 0x00000001, 0x00000000);  in gt215_hdmi_ctrl()
75 	nv_wr32(priv, 0x61c508 + soff, 0x000a0184);  in gt215_hdmi_ctrl()
76 	nv_wr32(priv, 0x61c50c + soff, 0x00000071);  in gt215_hdmi_ctrl()
77 	nv_wr32(priv, 0x61c510 + soff, 0x00000000);  in gt215_hdmi_ctrl()
78 	nv_mask(priv, 0x61c500 + soff, 0x00000001, 0x00000001);  in gt215_hdmi_ctrl()
80 	nv_mask(priv, 0x61c5d0 + soff, 0x00070001, 0x00010001); /* SPARE, HW_CTS */  in gt215_hdmi_ctrl()
81 	nv_mask(priv, 0x61c568 + soff, 0x00010101, 0x00000000); /* ACR_CTRL, ?? */  in gt215_hdmi_ctrl()
82 	nv_mask(priv, 0x61c578 + soff, 0x80000000, 0x80000000); /* ACR_0441_ENABLE */  in gt215_hdmi_ctrl()
90 	nv_mask(priv, 0x61c5a4 + soff, 0x5f1f007f, ctrl);  in gt215_hdmi_ctrl()