374 gf100_fifo_engidx(struct gf100_fifo_priv *priv, u32 engn)  in gf100_fifo_engidx()  argument
376 	switch (engn) {  in gf100_fifo_engidx()
377 	case NVDEV_ENGINE_GR    : engn = 0; break;  in gf100_fifo_engidx()
378 	case NVDEV_ENGINE_MSVLD : engn = 1; break;  in gf100_fifo_engidx()
379 	case NVDEV_ENGINE_MSPPP : engn = 2; break;  in gf100_fifo_engidx()
380 	case NVDEV_ENGINE_MSPDEC: engn = 3; break;  in gf100_fifo_engidx()
381 	case NVDEV_ENGINE_CE0   : engn = 4; break;  in gf100_fifo_engidx()
382 	case NVDEV_ENGINE_CE1   : engn = 5; break;  in gf100_fifo_engidx()
387 	return engn;  in gf100_fifo_engidx()
391 gf100_fifo_engine(struct gf100_fifo_priv *priv, u32 engn)  in gf100_fifo_engine()  argument
393 	switch (engn) {  in gf100_fifo_engine()
394 	case 0: engn = NVDEV_ENGINE_GR; break;  in gf100_fifo_engine()
395 	case 1: engn = NVDEV_ENGINE_MSVLD; break;  in gf100_fifo_engine()
396 	case 2: engn = NVDEV_ENGINE_MSPPP; break;  in gf100_fifo_engine()
397 	case 3: engn = NVDEV_ENGINE_MSPDEC; break;  in gf100_fifo_engine()
398 	case 4: engn = NVDEV_ENGINE_CE0; break;  in gf100_fifo_engine()
399 	case 5: engn = NVDEV_ENGINE_CE1; break;  in gf100_fifo_engine()
404 	return nvkm_engine(priv, engn);  in gf100_fifo_engine()
413 	u32 engn, engm = 0;  in gf100_fifo_recover_work()  local
421 	for (todo = mask; engn = __ffs64(todo), todo; todo &= ~(1 << engn))  in gf100_fifo_recover_work()
422 		engm |= 1 << gf100_fifo_engidx(priv, engn);  in gf100_fifo_recover_work()
425 	for (todo = mask; engn = __ffs64(todo), todo; todo &= ~(1 << engn)) {  in gf100_fifo_recover_work()
426 		if ((engine = (void *)nvkm_engine(priv, engn))) {  in gf100_fifo_recover_work()
493 	u32 engn;  in gf100_fifo_intr_sched_ctxsw()  local
495 	for (engn = 0; engn < 6; engn++) {  in gf100_fifo_intr_sched_ctxsw()
496 		u32 stat = nv_rd32(priv, 0x002640 + (engn * 0x04));  in gf100_fifo_intr_sched_ctxsw()
507 			if (!(engine = gf100_fifo_engine(priv, engn)))  in gf100_fifo_intr_sched_ctxsw()
729 gf100_fifo_intr_engine_unit(struct gf100_fifo_priv *priv, int engn)  in gf100_fifo_intr_engine_unit()  argument
731 	u32 intr = nv_rd32(priv, 0x0025a8 + (engn * 0x04));  in gf100_fifo_intr_engine_unit()
735 	nv_wr32(priv, 0x0025a8 + (engn * 0x04), intr);  in gf100_fifo_intr_engine_unit()
744 			nv_error(priv, "ENGINE %d %d %01x", engn, unkn, ints);  in gf100_fifo_intr_engine_unit()