Lines Matching refs:priv

246 gm204_gr_init_ctxctl(struct gf100_gr_priv *priv)  in gm204_gr_init_ctxctl()  argument
255 struct gf100_gr_priv *priv = (void *)object; in gm204_gr_init() local
256 const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, priv->tpc_total); in gm204_gr_init()
263 ret = nvkm_gr_init(&priv->base); in gm204_gr_init()
267 tmp = nv_rd32(priv, 0x100c80); /*XXX: mask? */ in gm204_gr_init()
268 nv_wr32(priv, 0x418880, 0x00001000 | (tmp & 0x00000fff)); in gm204_gr_init()
269 nv_wr32(priv, 0x418890, 0x00000000); in gm204_gr_init()
270 nv_wr32(priv, 0x418894, 0x00000000); in gm204_gr_init()
271 nv_wr32(priv, 0x4188b4, priv->unk4188b4->addr >> 8); in gm204_gr_init()
272 nv_wr32(priv, 0x4188b8, priv->unk4188b8->addr >> 8); in gm204_gr_init()
273 nv_mask(priv, 0x4188b0, 0x00040000, 0x00040000); in gm204_gr_init()
276 nv_wr32(priv, 0x100cc8, priv->unk4188b4->addr >> 8); in gm204_gr_init()
277 nv_wr32(priv, 0x100ccc, priv->unk4188b8->addr >> 8); in gm204_gr_init()
278 nv_mask(priv, 0x100cc4, 0x00040000, 0x00040000); in gm204_gr_init()
280 gf100_gr_mmio(priv, oclass->mmio); in gm204_gr_init()
282 gm107_gr_init_bios(priv); in gm204_gr_init()
284 nv_wr32(priv, GPC_UNIT(0, 0x3018), 0x00000001); in gm204_gr_init()
287 memcpy(tpcnr, priv->tpc_nr, sizeof(priv->tpc_nr)); in gm204_gr_init()
288 for (i = 0, gpc = -1; i < priv->tpc_total; i++) { in gm204_gr_init()
290 gpc = (gpc + 1) % priv->gpc_nr; in gm204_gr_init()
292 tpc = priv->tpc_nr[gpc] - tpcnr[gpc]--; in gm204_gr_init()
297 nv_wr32(priv, GPC_BCAST(0x0980), data[0]); in gm204_gr_init()
298 nv_wr32(priv, GPC_BCAST(0x0984), data[1]); in gm204_gr_init()
299 nv_wr32(priv, GPC_BCAST(0x0988), data[2]); in gm204_gr_init()
300 nv_wr32(priv, GPC_BCAST(0x098c), data[3]); in gm204_gr_init()
302 for (gpc = 0; gpc < priv->gpc_nr; gpc++) { in gm204_gr_init()
303 nv_wr32(priv, GPC_UNIT(gpc, 0x0914), in gm204_gr_init()
304 priv->magic_not_rop_nr << 8 | priv->tpc_nr[gpc]); in gm204_gr_init()
305 nv_wr32(priv, GPC_UNIT(gpc, 0x0910), 0x00040000 | in gm204_gr_init()
306 priv->tpc_total); in gm204_gr_init()
307 nv_wr32(priv, GPC_UNIT(gpc, 0x0918), magicgpc918); in gm204_gr_init()
310 nv_wr32(priv, GPC_BCAST(0x3fd4), magicgpc918); in gm204_gr_init()
311 nv_wr32(priv, GPC_BCAST(0x08ac), nv_rd32(priv, 0x100800)); in gm204_gr_init()
312 nv_wr32(priv, GPC_BCAST(0x033c), nv_rd32(priv, 0x100804)); in gm204_gr_init()
314 nv_wr32(priv, 0x400500, 0x00010001); in gm204_gr_init()
315 nv_wr32(priv, 0x400100, 0xffffffff); in gm204_gr_init()
316 nv_wr32(priv, 0x40013c, 0xffffffff); in gm204_gr_init()
317 nv_wr32(priv, 0x400124, 0x00000002); in gm204_gr_init()
318 nv_wr32(priv, 0x409c24, 0x000e0000); in gm204_gr_init()
319 nv_wr32(priv, 0x405848, 0xc0000000); in gm204_gr_init()
320 nv_wr32(priv, 0x40584c, 0x00000001); in gm204_gr_init()
321 nv_wr32(priv, 0x404000, 0xc0000000); in gm204_gr_init()
322 nv_wr32(priv, 0x404600, 0xc0000000); in gm204_gr_init()
323 nv_wr32(priv, 0x408030, 0xc0000000); in gm204_gr_init()
324 nv_wr32(priv, 0x404490, 0xc0000000); in gm204_gr_init()
325 nv_wr32(priv, 0x406018, 0xc0000000); in gm204_gr_init()
326 nv_wr32(priv, 0x407020, 0x40000000); in gm204_gr_init()
327 nv_wr32(priv, 0x405840, 0xc0000000); in gm204_gr_init()
328 nv_wr32(priv, 0x405844, 0x00ffffff); in gm204_gr_init()
329 nv_mask(priv, 0x419cc0, 0x00000008, 0x00000008); in gm204_gr_init()
331 for (gpc = 0; gpc < priv->gpc_nr; gpc++) { in gm204_gr_init()
332 for (ppc = 0; ppc < priv->ppc_nr[gpc]; ppc++) in gm204_gr_init()
333 nv_wr32(priv, PPC_UNIT(gpc, ppc, 0x038), 0xc0000000); in gm204_gr_init()
334 nv_wr32(priv, GPC_UNIT(gpc, 0x0420), 0xc0000000); in gm204_gr_init()
335 nv_wr32(priv, GPC_UNIT(gpc, 0x0900), 0xc0000000); in gm204_gr_init()
336 nv_wr32(priv, GPC_UNIT(gpc, 0x1028), 0xc0000000); in gm204_gr_init()
337 nv_wr32(priv, GPC_UNIT(gpc, 0x0824), 0xc0000000); in gm204_gr_init()
338 for (tpc = 0; tpc < priv->tpc_nr[gpc]; tpc++) { in gm204_gr_init()
339 nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x508), 0xffffffff); in gm204_gr_init()
340 nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x50c), 0xffffffff); in gm204_gr_init()
341 nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x224), 0xc0000000); in gm204_gr_init()
342 nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x48c), 0xc0000000); in gm204_gr_init()
343 nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000); in gm204_gr_init()
344 nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x430), 0xc0000000); in gm204_gr_init()
345 nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x644), 0x00dffffe); in gm204_gr_init()
346 nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x64c), 0x00000005); in gm204_gr_init()
348 nv_wr32(priv, GPC_UNIT(gpc, 0x2c90), 0xffffffff); in gm204_gr_init()
349 nv_wr32(priv, GPC_UNIT(gpc, 0x2c94), 0xffffffff); in gm204_gr_init()
352 for (rop = 0; rop < priv->rop_nr; rop++) { in gm204_gr_init()
353 nv_wr32(priv, ROP_UNIT(rop, 0x144), 0x40000000); in gm204_gr_init()
354 nv_wr32(priv, ROP_UNIT(rop, 0x070), 0x40000000); in gm204_gr_init()
355 nv_wr32(priv, ROP_UNIT(rop, 0x204), 0xffffffff); in gm204_gr_init()
356 nv_wr32(priv, ROP_UNIT(rop, 0x208), 0xffffffff); in gm204_gr_init()
359 nv_wr32(priv, 0x400108, 0xffffffff); in gm204_gr_init()
360 nv_wr32(priv, 0x400138, 0xffffffff); in gm204_gr_init()
361 nv_wr32(priv, 0x400118, 0xffffffff); in gm204_gr_init()
362 nv_wr32(priv, 0x400130, 0xffffffff); in gm204_gr_init()
363 nv_wr32(priv, 0x40011c, 0xffffffff); in gm204_gr_init()
364 nv_wr32(priv, 0x400134, 0xffffffff); in gm204_gr_init()
366 nv_wr32(priv, 0x400054, 0x2c350f63); in gm204_gr_init()
368 gf100_gr_zbc_init(priv); in gm204_gr_init()
370 return gm204_gr_init_ctxctl(priv); in gm204_gr_init()