44 	struct nv20_gr_chan *chan;  in nv20_gr_context_ctor()  local
48 				     16, NVOBJ_FLAG_ZERO_ALLOC, &chan);  in nv20_gr_context_ctor()
49 	*pobject = nv_object(chan);  in nv20_gr_context_ctor()
53 	chan->chid = nvkm_fifo_chan(parent)->chid;  in nv20_gr_context_ctor()
55 	nv_wo32(chan, 0x0000, 0x00000001 | (chan->chid << 24));  in nv20_gr_context_ctor()
56 	nv_wo32(chan, 0x033c, 0xffff0000);  in nv20_gr_context_ctor()
57 	nv_wo32(chan, 0x03a0, 0x0fff0000);  in nv20_gr_context_ctor()
58 	nv_wo32(chan, 0x03a4, 0x0fff0000);  in nv20_gr_context_ctor()
59 	nv_wo32(chan, 0x047c, 0x00000101);  in nv20_gr_context_ctor()
60 	nv_wo32(chan, 0x0490, 0x00000111);  in nv20_gr_context_ctor()
61 	nv_wo32(chan, 0x04a8, 0x44400000);  in nv20_gr_context_ctor()
63 		nv_wo32(chan, i, 0x00030303);  in nv20_gr_context_ctor()
65 		nv_wo32(chan, i, 0x00080000);  in nv20_gr_context_ctor()
67 		nv_wo32(chan, i, 0x01012000);  in nv20_gr_context_ctor()
69 		nv_wo32(chan, i, 0x000105b8);  in nv20_gr_context_ctor()
71 		nv_wo32(chan, i, 0x00080008);  in nv20_gr_context_ctor()
73 		nv_wo32(chan, i, 0x07ff0000);  in nv20_gr_context_ctor()
74 	nv_wo32(chan, 0x05a4, 0x4b7fffff);  in nv20_gr_context_ctor()
75 	nv_wo32(chan, 0x05fc, 0x00000001);  in nv20_gr_context_ctor()
76 	nv_wo32(chan, 0x0604, 0x00004000);  in nv20_gr_context_ctor()
77 	nv_wo32(chan, 0x0610, 0x00000001);  in nv20_gr_context_ctor()
78 	nv_wo32(chan, 0x0618, 0x00040000);  in nv20_gr_context_ctor()
79 	nv_wo32(chan, 0x061c, 0x00010000);  in nv20_gr_context_ctor()
81 		nv_wo32(chan, (i + 0), 0x10700ff9);  in nv20_gr_context_ctor()
82 		nv_wo32(chan, (i + 4), 0x0436086c);  in nv20_gr_context_ctor()
83 		nv_wo32(chan, (i + 8), 0x000c001b);  in nv20_gr_context_ctor()
85 	nv_wo32(chan, 0x281c, 0x3f800000);  in nv20_gr_context_ctor()
86 	nv_wo32(chan, 0x2830, 0x3f800000);  in nv20_gr_context_ctor()
87 	nv_wo32(chan, 0x285c, 0x40000000);  in nv20_gr_context_ctor()
88 	nv_wo32(chan, 0x2860, 0x3f800000);  in nv20_gr_context_ctor()
89 	nv_wo32(chan, 0x2864, 0x3f000000);  in nv20_gr_context_ctor()
90 	nv_wo32(chan, 0x286c, 0x40000000);  in nv20_gr_context_ctor()
91 	nv_wo32(chan, 0x2870, 0x3f800000);  in nv20_gr_context_ctor()
92 	nv_wo32(chan, 0x2878, 0xbf800000);  in nv20_gr_context_ctor()
93 	nv_wo32(chan, 0x2880, 0xbf800000);  in nv20_gr_context_ctor()
94 	nv_wo32(chan, 0x34a4, 0x000fe000);  in nv20_gr_context_ctor()
95 	nv_wo32(chan, 0x3530, 0x000003f8);  in nv20_gr_context_ctor()
96 	nv_wo32(chan, 0x3540, 0x002fe000);  in nv20_gr_context_ctor()
98 		nv_wo32(chan, i, 0x001c527c);  in nv20_gr_context_ctor()
106 	struct nv20_gr_chan *chan = (void *)object;  in nv20_gr_context_init()  local
109 	ret = nvkm_gr_context_init(&chan->base);  in nv20_gr_context_init()
113 	nv_wo32(priv->ctxtab, chan->chid * 4, nv_gpuobj(chan)->addr >> 4);  in nv20_gr_context_init()
121 	struct nv20_gr_chan *chan = (void *)object;  in nv20_gr_context_fini()  local
127 	if (chan->chid == chid) {  in nv20_gr_context_fini()
128 		nv_wr32(priv, 0x400784, nv_gpuobj(chan)->addr >> 4);  in nv20_gr_context_fini()
136 	nv_wo32(priv->ctxtab, chan->chid * 4, 0x00000000);  in nv20_gr_context_fini()
137 	return nvkm_gr_context_fini(&chan->base, suspend);  in nv20_gr_context_fini()