43 read_vco(struct gt215_clk_priv *priv, int clk)  in read_vco()  argument
45 	u32 sctl = nv_rd32(priv, 0x4120 + (clk * 4));  in read_vco()
49 		return nv_device(priv)->crystal;  in read_vco()
51 		return read_pll(priv, 0x41, 0x00e820);  in read_vco()
53 		return read_pll(priv, 0x42, 0x00e8a0);  in read_vco()
60 read_clk(struct gt215_clk_priv *priv, int clk, bool ignore_en)  in read_clk()  argument
66 		if (nv_device(priv)->chipset == 0xaf) {  in read_clk()
68 			return nv_rd32(priv, 0x00471c) * 1000;  in read_clk()
71 		return nv_device(priv)->crystal;  in read_clk()
74 	sctl = nv_rd32(priv, 0x4120 + (clk * 4));  in read_clk()
86 			return nv_device(priv)->crystal;  in read_clk()
97 		sclk = read_vco(priv, clk);  in read_clk()
106 read_pll(struct gt215_clk_priv *priv, int clk, u32 pll)  in read_pll()  argument
108 	u32 ctrl = nv_rd32(priv, pll + 0);  in read_pll()
113 			u32 coef = nv_rd32(priv, pll + 4);  in read_pll()
124 			sclk = read_clk(priv, 0x00 + clk, false);  in read_pll()
127 		sclk = read_clk(priv, 0x10 + clk, false);  in read_pll()
139 	struct gt215_clk_priv *priv = (void *)clk;  in gt215_clk_read()  local
144 		return nv_device(priv)->crystal;  in gt215_clk_read()
147 		return read_pll(priv, 0x00, 0x4200);  in gt215_clk_read()
149 		return read_pll(priv, 0x01, 0x4220);  in gt215_clk_read()
151 		return read_pll(priv, 0x02, 0x4000);  in gt215_clk_read()
153 		return read_clk(priv, 0x20, false);  in gt215_clk_read()
155 		return read_clk(priv, 0x21, false);  in gt215_clk_read()
157 		return read_clk(priv, 0x25, false);  in gt215_clk_read()
159 		hsrc = (nv_rd32(priv, 0xc040) & 0x30000000) >> 28;  in gt215_clk_read()
162 			return read_clk(priv, 0x1d, false);  in gt215_clk_read()
182 	struct gt215_clk_priv *priv = (void *)clock;  in gt215_clk_info()  local
198 		sclk = read_vco(priv, clk);  in gt215_clk_info()
230 	struct gt215_clk_priv *priv = (void *)clock;  in gt215_pll_info()  local
254 	ret = gt215_pll_calc(nv_subdev(priv), &limits, khz, &N, NULL, &M, &P);  in gt215_pll_info()
265 calc_clk(struct gt215_clk_priv *priv, struct nvkm_cstate *cstate,  in calc_clk()  argument
268 	int ret = gt215_pll_info(&priv->base, clk, pll, cstate->domain[idx],  in calc_clk()
269 				 &priv->eng[idx]);  in calc_clk()
276 calc_host(struct gt215_clk_priv *priv, struct nvkm_cstate *cstate)  in calc_host()  argument
280 	struct gt215_clk_info *info = &priv->eng[nv_clk_src_host];  in calc_host()
290 	ret = gt215_clk_info(&priv->base, 0x1d, kHz, info);  in calc_host()
333 disable_clk_src(struct gt215_clk_priv *priv, u32 src)  in disable_clk_src()  argument
335 	nv_mask(priv, src, 0x00000100, 0x00000000);  in disable_clk_src()
336 	nv_mask(priv, src, 0x00000001, 0x00000000);  in disable_clk_src()
340 prog_pll(struct gt215_clk_priv *priv, int clk, u32 pll, int idx)  in prog_pll()  argument
342 	struct gt215_clk_info *info = &priv->eng[idx];  in prog_pll()
351 		bypass = nv_rd32(priv, ctrl)  & 0x00000008;  in prog_pll()
353 			nv_mask(priv, src1, 0x00000101, 0x00000101);  in prog_pll()
354 			nv_mask(priv, ctrl, 0x00000008, 0x00000008);  in prog_pll()
358 		nv_mask(priv, src0, 0x003f3141, 0x00000101 | info->clk);  in prog_pll()
359 		nv_wr32(priv, coef, info->pll);  in prog_pll()
360 		nv_mask(priv, ctrl, 0x00000015, 0x00000015);  in prog_pll()
361 		nv_mask(priv, ctrl, 0x00000010, 0x00000000);  in prog_pll()
362 		if (!nv_wait(priv, ctrl, 0x00020000, 0x00020000)) {  in prog_pll()
363 			nv_mask(priv, ctrl, 0x00000010, 0x00000010);  in prog_pll()
364 			nv_mask(priv, src0, 0x00000101, 0x00000000);  in prog_pll()
367 		nv_mask(priv, ctrl, 0x00000010, 0x00000010);  in prog_pll()
368 		nv_mask(priv, ctrl, 0x00000008, 0x00000000);  in prog_pll()
369 		disable_clk_src(priv, src1);  in prog_pll()
371 		nv_mask(priv, src1, 0x003f3141, 0x00000101 | info->clk);  in prog_pll()
372 		nv_mask(priv, ctrl, 0x00000018, 0x00000018);  in prog_pll()
374 		nv_mask(priv, ctrl, 0x00000001, 0x00000000);  in prog_pll()
375 		disable_clk_src(priv, src0);  in prog_pll()
380 prog_clk(struct gt215_clk_priv *priv, int clk, int idx)  in prog_clk()  argument
382 	struct gt215_clk_info *info = &priv->eng[idx];  in prog_clk()
383 	nv_mask(priv, 0x004120 + (clk * 4), 0x003f3141, 0x00000101 | info->clk);  in prog_clk()
387 prog_host(struct gt215_clk_priv *priv)  in prog_host()  argument
389 	struct gt215_clk_info *info = &priv->eng[nv_clk_src_host];  in prog_host()
390 	u32 hsrc = (nv_rd32(priv, 0xc040));  in prog_host()
395 			nv_wr32(priv, 0xc040, hsrc | 0x20000000);  in prog_host()
396 			disable_clk_src(priv, 0x4194);  in prog_host()
400 		prog_clk(priv, 0x1d, nv_clk_src_host);  in prog_host()
402 			nv_wr32(priv, 0xc040, hsrc & ~0x30000000);  in prog_host()
410 	nv_wr32(priv, 0xc044, 0x3e);  in prog_host()
414 prog_core(struct gt215_clk_priv *priv, int idx)  in prog_core()  argument
416 	struct gt215_clk_info *info = &priv->eng[idx];  in prog_core()
417 	u32 fb_delay = nv_rd32(priv, 0x10002c);  in prog_core()
420 		nv_wr32(priv, 0x10002c, info->fb_delay);  in prog_core()
422 	prog_pll(priv, 0x00, 0x004200, idx);  in prog_core()
425 		nv_wr32(priv, 0x10002c, info->fb_delay);  in prog_core()
431 	struct gt215_clk_priv *priv = (void *)clk;  in gt215_clk_calc()  local
432 	struct gt215_clk_info *core = &priv->eng[nv_clk_src_core];  in gt215_clk_calc()
435 	if ((ret = calc_clk(priv, cstate, 0x10, 0x4200, nv_clk_src_core)) ||  in gt215_clk_calc()
436 	    (ret = calc_clk(priv, cstate, 0x11, 0x4220, nv_clk_src_shader)) ||  in gt215_clk_calc()
437 	    (ret = calc_clk(priv, cstate, 0x20, 0x0000, nv_clk_src_disp)) ||  in gt215_clk_calc()
438 	    (ret = calc_clk(priv, cstate, 0x21, 0x0000, nv_clk_src_vdec)) ||  in gt215_clk_calc()
439 	    (ret = calc_host(priv, cstate)))  in gt215_clk_calc()
447 				     &priv->eng[nv_clk_src_core_intm]);  in gt215_clk_calc()
458 	struct gt215_clk_priv *priv = (void *)clk;  in gt215_clk_prog()  local
459 	struct gt215_clk_info *core = &priv->eng[nv_clk_src_core];  in gt215_clk_prog()
469 		prog_core(priv, nv_clk_src_core_intm);  in gt215_clk_prog()
471 	prog_core(priv,  nv_clk_src_core);  in gt215_clk_prog()
472 	prog_pll(priv, 0x01, 0x004220, nv_clk_src_shader);  in gt215_clk_prog()
473 	prog_clk(priv, 0x20, nv_clk_src_disp);  in gt215_clk_prog()
474 	prog_clk(priv, 0x21, nv_clk_src_vdec);  in gt215_clk_prog()
475 	prog_host(priv);  in gt215_clk_prog()
508 	struct gt215_clk_priv *priv;  in gt215_clk_ctor()  local
512 			      NULL, 0, true, &priv);  in gt215_clk_ctor()
513 	*pobject = nv_object(priv);  in gt215_clk_ctor()
517 	priv->base.read = gt215_clk_read;  in gt215_clk_ctor()
518 	priv->base.calc = gt215_clk_calc;  in gt215_clk_ctor()
519 	priv->base.prog = gt215_clk_prog;  in gt215_clk_ctor()
520 	priv->base.tidy = gt215_clk_tidy;  in gt215_clk_ctor()