Lines Matching refs:dp_lane_count
469 &dig_connector->dp_lane_count, in radeon_dp_set_link_config()
473 dig_connector->dp_lane_count = 0; in radeon_dp_set_link_config()
516 if (drm_dp_channel_eq_ok(link_status, dig->dp_lane_count)) in radeon_dp_needs_link_train()
547 int dp_lane_count; member
566 dp_info->train_set, dp_info->dp_lane_count); in radeon_dp_update_vs_emph()
625 tmp = dp_info->dp_lane_count; in radeon_dp_link_train_init()
695 if (drm_dp_clock_recovery_ok(dp_info->link_status, dp_info->dp_lane_count)) { in radeon_dp_link_train_cr()
700 for (i = 0; i < dp_info->dp_lane_count; i++) { in radeon_dp_link_train_cr()
704 if (i == dp_info->dp_lane_count) { in radeon_dp_link_train_cr()
721 dp_get_adjust_train(dp_info->link_status, dp_info->dp_lane_count, dp_info->train_set); in radeon_dp_link_train_cr()
758 if (drm_dp_channel_eq_ok(dp_info->link_status, dp_info->dp_lane_count)) { in radeon_dp_link_train_ce()
770 dp_get_adjust_train(dp_info->link_status, dp_info->dp_lane_count, dp_info->train_set); in radeon_dp_link_train_ce()
850 dp_info.dp_lane_count = dig_connector->dp_lane_count; in radeon_dp_link_train()