553 	LVDS_ENCODER_CONTROL_PS_ALLOCATION    v1;  member
601 			args.v1.ucMisc = 0;  in atombios_digital_setup()
602 			args.v1.ucAction = action;  in atombios_digital_setup()
604 				args.v1.ucMisc |= PANEL_ENCODER_MISC_HDMI_TYPE;  in atombios_digital_setup()
605 			args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);  in atombios_digital_setup()
608 					args.v1.ucMisc |= PANEL_ENCODER_MISC_DUAL;  in atombios_digital_setup()
610 					args.v1.ucMisc |= ATOM_PANEL_MISC_888RGB;  in atombios_digital_setup()
613 					args.v1.ucMisc |= PANEL_ENCODER_MISC_TMDS_LINKB;  in atombios_digital_setup()
615 					args.v1.ucMisc |= PANEL_ENCODER_MISC_DUAL;  in atombios_digital_setup()
617 				args.v1.ucMisc |= ATOM_PANEL_MISC_888RGB;  in atombios_digital_setup()
832 	DIG_ENCODER_CONTROL_PS_ALLOCATION v1;  member
885 			args.v1.ucAction = action;  in atombios_dig_encoder_setup2()
886 			args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);  in atombios_dig_encoder_setup2()
890 				args.v1.ucEncoderMode = atombios_get_encoder_mode(encoder);  in atombios_dig_encoder_setup2()
892 			if (ENCODER_MODE_IS_DP(args.v1.ucEncoderMode))  in atombios_dig_encoder_setup2()
893 				args.v1.ucLaneNum = dp_lane_count;  in atombios_dig_encoder_setup2()
895 				args.v1.ucLaneNum = 8;  in atombios_dig_encoder_setup2()
897 				args.v1.ucLaneNum = 4;  in atombios_dig_encoder_setup2()
901 				args.v1.ucConfig = ATOM_ENCODER_CONFIG_V2_TRANSMITTER1;  in atombios_dig_encoder_setup2()
905 				args.v1.ucConfig = ATOM_ENCODER_CONFIG_V2_TRANSMITTER2;  in atombios_dig_encoder_setup2()
908 				args.v1.ucConfig = ATOM_ENCODER_CONFIG_V2_TRANSMITTER3;  in atombios_dig_encoder_setup2()
912 				args.v1.ucConfig |= ATOM_ENCODER_CONFIG_LINKB;  in atombios_dig_encoder_setup2()
914 				args.v1.ucConfig |= ATOM_ENCODER_CONFIG_LINKA;  in atombios_dig_encoder_setup2()
916 			if (ENCODER_MODE_IS_DP(args.v1.ucEncoderMode) && (dp_clock == 270000))  in atombios_dig_encoder_setup2()
917 				args.v1.ucConfig |= ATOM_ENCODER_CONFIG_DPLINKRATE_2_70GHZ;  in atombios_dig_encoder_setup2()
937 				args.v1.ucConfig |= ATOM_ENCODER_CONFIG_V3_DPLINKRATE_2_70GHZ;  in atombios_dig_encoder_setup2()
961 					args.v1.ucConfig |= ATOM_ENCODER_CONFIG_V4_DPLINKRATE_5_40GHZ;  in atombios_dig_encoder_setup2()
963 					args.v1.ucConfig |= ATOM_ENCODER_CONFIG_V4_DPLINKRATE_3_24GHZ;  in atombios_dig_encoder_setup2()
965 					args.v1.ucConfig |= ATOM_ENCODER_CONFIG_V4_DPLINKRATE_2_70GHZ;  in atombios_dig_encoder_setup2()
967 					args.v1.ucConfig |= ATOM_ENCODER_CONFIG_V4_DPLINKRATE_1_62GHZ;  in atombios_dig_encoder_setup2()
1001 	DIG_TRANSMITTER_CONTROL_PS_ALLOCATION v1;  member
1086 			args.v1.ucAction = action;  in atombios_dig_transmitter_setup2()
1088 				args.v1.usInitInfo = cpu_to_le16(connector_object_id);  in atombios_dig_transmitter_setup2()
1090 				args.v1.asMode.ucLaneSel = lane_num;  in atombios_dig_transmitter_setup2()
1091 				args.v1.asMode.ucLaneSet = lane_set;  in atombios_dig_transmitter_setup2()
1094 					args.v1.usPixelClock = cpu_to_le16(dp_clock / 10);  in atombios_dig_transmitter_setup2()
1096 					args.v1.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10);  in atombios_dig_transmitter_setup2()
1098 					args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);  in atombios_dig_transmitter_setup2()
1101 			args.v1.ucConfig = ATOM_TRANSMITTER_CONFIG_CLKSRC_PPLL;  in atombios_dig_transmitter_setup2()
1104 				args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG2_ENCODER;  in atombios_dig_transmitter_setup2()
1106 				args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG1_ENCODER;  in atombios_dig_transmitter_setup2()
1113 						args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_3;  in atombios_dig_transmitter_setup2()
1115 						args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_4_7;  in atombios_dig_transmitter_setup2()
1117 						args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_11;  in atombios_dig_transmitter_setup2()
1119 						args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_12_15;  in atombios_dig_transmitter_setup2()
1122 						args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_7;  in atombios_dig_transmitter_setup2()
1124 						args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_15;  in atombios_dig_transmitter_setup2()
1129 				args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKB;  in atombios_dig_transmitter_setup2()
1131 				args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKA;  in atombios_dig_transmitter_setup2()
1134 				args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_COHERENT;  in atombios_dig_transmitter_setup2()
1137 					args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_COHERENT;  in atombios_dig_transmitter_setup2()
1139 					args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_8LANE_LINK;  in atombios_dig_transmitter_setup2()
1406 	args.v1.ucAction = action;  in atombios_set_edp_panel_power()
1426 	EXTERNAL_ENCODER_CONTROL_PS_ALLOCATION v1;  member
1477 			args.v1.sDigEncoder.ucAction = action;  in atombios_external_encoder_setup()
1478 			args.v1.sDigEncoder.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);  in atombios_external_encoder_setup()
1479 			args.v1.sDigEncoder.ucEncoderMode = atombios_get_encoder_mode(encoder);  in atombios_external_encoder_setup()
1481 			if (ENCODER_MODE_IS_DP(args.v1.sDigEncoder.ucEncoderMode)) {  in atombios_external_encoder_setup()
1483 					args.v1.sDigEncoder.ucConfig |= ATOM_ENCODER_CONFIG_DPLINKRATE_2_70GHZ;  in atombios_external_encoder_setup()
1484 				args.v1.sDigEncoder.ucLaneNum = dp_lane_count;  in atombios_external_encoder_setup()
1486 				args.v1.sDigEncoder.ucLaneNum = 8;  in atombios_external_encoder_setup()
1488 				args.v1.sDigEncoder.ucLaneNum = 4;  in atombios_external_encoder_setup()
1852 	SELECT_CRTC_SOURCE_PS_ALLOCATION v1;  member
1879 				args.v1.ucCRTC = radeon_crtc->crtc_id;  in atombios_set_encoder_crtc_source()
1882 					args.v1.ucCRTC = radeon_crtc->crtc_id;  in atombios_set_encoder_crtc_source()
1884 					args.v1.ucCRTC = radeon_crtc->crtc_id << 2;  in atombios_set_encoder_crtc_source()
1890 				args.v1.ucDevice = ATOM_DEVICE_DFP1_INDEX;  in atombios_set_encoder_crtc_source()
1895 					args.v1.ucDevice = ATOM_DEVICE_LCD1_INDEX;  in atombios_set_encoder_crtc_source()
1897 					args.v1.ucDevice = ATOM_DEVICE_DFP3_INDEX;  in atombios_set_encoder_crtc_source()
1902 				args.v1.ucDevice = ATOM_DEVICE_DFP2_INDEX;  in atombios_set_encoder_crtc_source()
1907 					args.v1.ucDevice = ATOM_DEVICE_TV1_INDEX;  in atombios_set_encoder_crtc_source()
1909 					args.v1.ucDevice = ATOM_DEVICE_CV_INDEX;  in atombios_set_encoder_crtc_source()
1911 					args.v1.ucDevice = ATOM_DEVICE_CRT1_INDEX;  in atombios_set_encoder_crtc_source()
1916 					args.v1.ucDevice = ATOM_DEVICE_TV1_INDEX;  in atombios_set_encoder_crtc_source()
1918 					args.v1.ucDevice = ATOM_DEVICE_CV_INDEX;  in atombios_set_encoder_crtc_source()
1920 					args.v1.ucDevice = ATOM_DEVICE_CRT2_INDEX;  in atombios_set_encoder_crtc_source()