597 				WREG32_SMC(config_regs->offset, data);  in ci_program_pt_config_registers()
881 	WREG32_SMC(CG_THERMAL_INT, tmp);  in ci_thermal_set_temperature_range()
888 	WREG32_SMC(CG_THERMAL_CTRL, tmp);  in ci_thermal_set_temperature_range()
905 		WREG32_SMC(CG_THERMAL_INT, thermal_int);  in ci_thermal_enable_alert()
914 		WREG32_SMC(CG_THERMAL_INT, thermal_int);  in ci_thermal_enable_alert()
941 	WREG32_SMC(CG_FDO_CTRL2, tmp);  in ci_fan_ctrl_set_static_mode()
945 	WREG32_SMC(CG_FDO_CTRL2, tmp);  in ci_fan_ctrl_set_static_mode()
1119 	WREG32_SMC(CG_FDO_CTRL0, tmp);  in ci_fan_ctrl_set_fan_speed_percent()
1196 	WREG32_SMC(CG_TACH_CTRL, tmp);
1212 		WREG32_SMC(CG_FDO_CTRL2, tmp);  in ci_fan_ctrl_set_default_mode()
1216 		WREG32_SMC(CG_FDO_CTRL2, tmp);  in ci_fan_ctrl_set_default_mode()
1236 		WREG32_SMC(CG_TACH_CTRL, tmp);  in ci_thermal_initialize()
1241 	WREG32_SMC(CG_FDO_CTRL2, tmp);  in ci_thermal_initialize()
1404 		WREG32_SMC(CG_THERMAL_CTRL, tmp);  in ci_set_dpm_event_sources()
1412 		WREG32_SMC(GENERAL_PWRMGT, tmp);  in ci_set_dpm_event_sources()
1416 		WREG32_SMC(GENERAL_PWRMGT, tmp);  in ci_set_dpm_event_sources()
1490 			WREG32_SMC(LCAC_MC0_CNTL, 0x05);  in ci_enable_sclk_mclk_dpm()
1491 			WREG32_SMC(LCAC_MC1_CNTL, 0x05);  in ci_enable_sclk_mclk_dpm()
1492 			WREG32_SMC(LCAC_CPL_CNTL, 0x100005);  in ci_enable_sclk_mclk_dpm()
1496 			WREG32_SMC(LCAC_MC0_CNTL, 0x400005);  in ci_enable_sclk_mclk_dpm()
1497 			WREG32_SMC(LCAC_MC1_CNTL, 0x400005);  in ci_enable_sclk_mclk_dpm()
1498 			WREG32_SMC(LCAC_CPL_CNTL, 0x500005);  in ci_enable_sclk_mclk_dpm()
1526 	WREG32_SMC(GENERAL_PWRMGT, tmp);  in ci_start_dpm()
1530 	WREG32_SMC(SCLK_PWRMGT_CNTL, tmp);  in ci_start_dpm()
1587 	WREG32_SMC(GENERAL_PWRMGT, tmp);  in ci_stop_dpm()
1591 	WREG32_SMC(SCLK_PWRMGT_CNTL, tmp);  in ci_stop_dpm()
1618 	WREG32_SMC(SCLK_PWRMGT_CNTL, tmp);  in ci_enable_sclk_control()
1883 	WREG32_SMC(GENERAL_PWRMGT, tmp);  in ci_enable_thermal_protection()
1892 	WREG32_SMC(GENERAL_PWRMGT, tmp);  in ci_enable_acpi_power_management()
1969 	WREG32_SMC(CG_DISPLAY_GAP_CNTL, tmp);  in ci_program_display_gap()
1980 	WREG32_SMC(CG_DISPLAY_GAP_CNTL2, tmp);  in ci_program_display_gap()
1998 			WREG32_SMC(GENERAL_PWRMGT, tmp);  in ci_enable_spread_spectrum()
2003 		WREG32_SMC(CG_SPLL_SPREAD_SPECTRUM, tmp);  in ci_enable_spread_spectrum()
2007 		WREG32_SMC(GENERAL_PWRMGT, tmp);  in ci_enable_spread_spectrum()
2013 	WREG32_SMC(CG_SSP, (SSTU(R600_SSTU_DFLT) | SST(R600_SST_DFLT)));  in ci_program_sstp()
2024 	WREG32_SMC(CG_DISPLAY_GAP_CNTL, tmp);  in ci_enable_display_gap()
2033 	WREG32_SMC(SCLK_PWRMGT_CNTL, tmp);  in ci_program_vc()
2035 	WREG32_SMC(CG_FTV_0, CISLANDS_VRC_DFLT0);  in ci_program_vc()
2036 	WREG32_SMC(CG_FTV_1, CISLANDS_VRC_DFLT1);  in ci_program_vc()
2037 	WREG32_SMC(CG_FTV_2, CISLANDS_VRC_DFLT2);  in ci_program_vc()
2038 	WREG32_SMC(CG_FTV_3, CISLANDS_VRC_DFLT3);  in ci_program_vc()
2039 	WREG32_SMC(CG_FTV_4, CISLANDS_VRC_DFLT4);  in ci_program_vc()
2040 	WREG32_SMC(CG_FTV_5, CISLANDS_VRC_DFLT5);  in ci_program_vc()
2041 	WREG32_SMC(CG_FTV_6, CISLANDS_VRC_DFLT6);  in ci_program_vc()
2042 	WREG32_SMC(CG_FTV_7, CISLANDS_VRC_DFLT7);  in ci_program_vc()
2051 	WREG32_SMC(SCLK_PWRMGT_CNTL, tmp);  in ci_clear_vc()
2053 	WREG32_SMC(CG_FTV_0, 0);  in ci_clear_vc()
2054 	WREG32_SMC(CG_FTV_1, 0);  in ci_clear_vc()
2055 	WREG32_SMC(CG_FTV_2, 0);  in ci_clear_vc()
2056 	WREG32_SMC(CG_FTV_3, 0);  in ci_clear_vc()
2057 	WREG32_SMC(CG_FTV_4, 0);  in ci_clear_vc()
2058 	WREG32_SMC(CG_FTV_5, 0);  in ci_clear_vc()
2059 	WREG32_SMC(CG_FTV_6, 0);  in ci_clear_vc()
2060 	WREG32_SMC(CG_FTV_7, 0);  in ci_clear_vc()
2072 	WREG32_SMC(SMC_SYSCON_MISC_CNTL, 1);  in ci_upload_firmware()
3555 		WREG32_SMC(CG_ULV_PARAMETER, ulv->cg_ulv_parameter);  in ci_init_smc_table()
4060 		WREG32_SMC(DPM_TABLE_475, tmp);  in ci_update_uvd_dpm()
4098 			WREG32_SMC(DPM_TABLE_475, tmp);  in ci_update_vce_dpm()
4128 		WREG32_SMC(DPM_TABLE_475, tmp);
4761 	WREG32_SMC(GENERAL_PWRMGT, tmp);  in ci_enable_voltage_control()
5824 		WREG32_SMC(CNB_PWRMGT_CNTL, tmp);  in ci_dpm_init()