3861 	radeon_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));  in cik_ring_test()
3917 	radeon_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));  in cik_hdp_flush_cp_ring_emit()
3946 	radeon_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4));  in cik_fence_gfx_ring_emit()
3958 	radeon_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4));  in cik_fence_gfx_ring_emit()
3985 	radeon_ring_write(ring, PACKET3(PACKET3_RELEASE_MEM, 5));  in cik_fence_compute_ring_emit()
4016 	radeon_ring_write(ring, PACKET3(PACKET3_MEM_SEMAPHORE, 1));  in cik_semaphore_ring_emit()
4022 		radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));  in cik_semaphore_ring_emit()
4077 		radeon_ring_write(ring, PACKET3(PACKET3_DMA_DATA, 5));  in cik_copy_cpdma()
4124 		radeon_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));  in cik_ring_ib_execute()
4127 		header = PACKET3(PACKET3_INDIRECT_BUFFER_CONST, 2);  in cik_ring_ib_execute()
4132 			radeon_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));  in cik_ring_ib_execute()
4138 			radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));  in cik_ring_ib_execute()
4145 		header = PACKET3(PACKET3_INDIRECT_BUFFER, 2);  in cik_ring_ib_execute()
4190 	ib.ptr[0] = PACKET3(PACKET3_SET_UCONFIG_REG, 1);  in cik_ib_test()
4384 	radeon_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));  in cik_cp_gfx_start()
4390 	radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));  in cik_cp_gfx_start()
4393 	radeon_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));  in cik_cp_gfx_start()
4400 	radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));  in cik_cp_gfx_start()
4404 	radeon_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0));  in cik_cp_gfx_start()
4407 	radeon_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2));  in cik_cp_gfx_start()
6094 	radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));  in cik_vm_flush()
6108 	radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));  in cik_vm_flush()
6115 	radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 6));  in cik_vm_flush()
6126 	radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));  in cik_vm_flush()
6137 	radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));  in cik_vm_flush()
6145 	radeon_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));  in cik_vm_flush()
6158 		radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));  in cik_vm_flush()
7134 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));  in cik_get_csb_buffer()
7137 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1));  in cik_get_csb_buffer()
7145 					cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count));  in cik_get_csb_buffer()
7155 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 2));  in cik_get_csb_buffer()
7181 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));  in cik_get_csb_buffer()
7184 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0));  in cik_get_csb_buffer()
8619 			nop = PACKET3(PACKET3_NOP, 0x3FFF);  in cik_startup()
8623 		nop = PACKET3(PACKET3_NOP, 0x3FFF);  in cik_startup()