Lines Matching refs:mc
126 extern void si_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc);
4263 radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size); in cik_cp_gfx_enable()
4502 radeon_ttm_set_active_vram_size(rdev, rdev->mc.real_vram_size); in cik_cp_gfx_resume()
5681 rdev->mc.vram_start >> 12); in cik_mc_program()
5683 rdev->mc.vram_end >> 12); in cik_mc_program()
5686 tmp = ((rdev->mc.vram_end >> 24) & 0xFFFF) << 16; in cik_mc_program()
5687 tmp |= ((rdev->mc.vram_start >> 24) & 0xFFFF); in cik_mc_program()
5690 WREG32(HDP_NONSURFACE_BASE, (rdev->mc.vram_start >> 8)); in cik_mc_program()
5720 rdev->mc.vram_is_ddr = true; in cik_mc_init()
5758 rdev->mc.vram_width = numchan * chansize; in cik_mc_init()
5760 rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0); in cik_mc_init()
5761 rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0); in cik_mc_init()
5763 rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024ULL * 1024ULL; in cik_mc_init()
5764 rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024ULL * 1024ULL; in cik_mc_init()
5765 rdev->mc.visible_vram_size = rdev->mc.aper_size; in cik_mc_init()
5766 si_vram_gtt_location(rdev, &rdev->mc); in cik_mc_init()
5858 WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12); in cik_pcie_gart_enable()
5859 WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12); in cik_pcie_gart_enable()
5933 (unsigned)(rdev->mc.gtt_size >> 20), in cik_pcie_gart_enable()