1803 	u32 idx_value;  in evergreen_packet3_check()  local
1808 	idx_value = radeon_get_ib_value(p, idx);  in evergreen_packet3_check()
1841 		         (idx_value & 0xfffffff0) +  in evergreen_packet3_check()
1887 		         idx_value +  in evergreen_packet3_check()
1922 		         idx_value +  in evergreen_packet3_check()
2033 		if (idx_value != 1) {  in evergreen_packet3_check()
2066 		if (idx_value + size > track->indirect_draw_buffer_size) {  in evergreen_packet3_check()
2068 				idx_value, size, track->indirect_draw_buffer_size);  in evergreen_packet3_check()
2100 		ib[idx+0] = idx_value + (u32)(reloc->gpu_offset & 0xffffffff);  in evergreen_packet3_check()
2113 		if (idx_value & 0x10) {  in evergreen_packet3_check()
2128 		} else if (idx_value & 0x100) {  in evergreen_packet3_check()
2316 		start_reg = (idx_value << 2) + PACKET3_SET_CONFIG_REG_START;  in evergreen_packet3_check()
2332 		start_reg = (idx_value << 2) + PACKET3_SET_CONTEXT_REG_START;  in evergreen_packet3_check()
2352 		start_reg = (idx_value << 2) + PACKET3_SET_RESOURCE_START;  in evergreen_packet3_check()
2455 		start_reg = (idx_value << 2) + PACKET3_SET_BOOL_CONST_START;  in evergreen_packet3_check()
2465 		start_reg = (idx_value << 2) + PACKET3_SET_LOOP_CONST_START;  in evergreen_packet3_check()
2475 		start_reg = (idx_value << 2) + PACKET3_SET_CTL_CONST_START;  in evergreen_packet3_check()
2489 		start_reg = (idx_value << 2) + PACKET3_SET_SAMPLER_START;  in evergreen_packet3_check()
2504 		if (idx_value & 0x1) {  in evergreen_packet3_check()
2523 		if (((idx_value >> 1) & 0x3) == 2) {  in evergreen_packet3_check()
2576 		if (idx_value & 0x1) {  in evergreen_packet3_check()
2600 		if (idx_value & 0x2) {  in evergreen_packet3_check()
3310 	u32 idx_value = ib[idx];  in evergreen_vm_packet3_check()  local
3318 		if (idx_value != 1) {  in evergreen_vm_packet3_check()
3365 		if (idx_value & 0x100) {  in evergreen_vm_packet3_check()
3372 		if (idx_value & 0x2) {  in evergreen_vm_packet3_check()
3379 		start_reg = (idx_value << 2) + PACKET3_SET_CONFIG_REG_START;  in evergreen_vm_packet3_check()
3411 				start_reg = idx_value << 2;  in evergreen_vm_packet3_check()