Lines Matching refs:RREG32_PCIE
64 tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_CNTL); in rv370_pcie_gart_tlb_flush()
66 (void)RREG32_PCIE(RADEON_PCIE_TX_GART_CNTL); in rv370_pcie_gart_tlb_flush()
150 tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_CNTL); in rv370_pcie_gart_enable()
170 tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_CNTL); in rv370_pcie_gart_disable()
511 link_width_cntl = RREG32_PCIE(RADEON_PCIE_LC_LINK_WIDTH_CNTL); in rv370_set_pcie_lanes()
527 link_width_cntl = RREG32_PCIE(RADEON_PCIE_LC_LINK_WIDTH_CNTL); in rv370_set_pcie_lanes()
529 link_width_cntl = RREG32_PCIE(RADEON_PCIE_LC_LINK_WIDTH_CNTL); in rv370_set_pcie_lanes()
545 link_width_cntl = RREG32_PCIE(RADEON_PCIE_LC_LINK_WIDTH_CNTL); in rv370_get_pcie_lanes()
572 tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_CNTL); in rv370_debugfs_pcie_gart_info()
574 tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_BASE); in rv370_debugfs_pcie_gart_info()
576 tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_START_LO); in rv370_debugfs_pcie_gart_info()
578 tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_START_HI); in rv370_debugfs_pcie_gart_info()
580 tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_END_LO); in rv370_debugfs_pcie_gart_info()
582 tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_END_HI); in rv370_debugfs_pcie_gart_info()
584 tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_ERROR); in rv370_debugfs_pcie_gart_info()