Lines Matching refs:tiling_config
1932 u32 tiling_config; in r600_gpu_init() local
2027 tiling_config = 0; in r600_gpu_init()
2031 tiling_config |= PIPE_TILING(0); in r600_gpu_init()
2034 tiling_config |= PIPE_TILING(1); in r600_gpu_init()
2037 tiling_config |= PIPE_TILING(2); in r600_gpu_init()
2040 tiling_config |= PIPE_TILING(3); in r600_gpu_init()
2047 tiling_config |= BANK_TILING((ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT); in r600_gpu_init()
2048 tiling_config |= GROUP_SIZE((ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT); in r600_gpu_init()
2052 tiling_config |= ROW_TILING(3); in r600_gpu_init()
2053 tiling_config |= SAMPLE_SPLIT(3); in r600_gpu_init()
2055 tiling_config |= ROW_TILING(tmp); in r600_gpu_init()
2056 tiling_config |= SAMPLE_SPLIT(tmp); in r600_gpu_init()
2058 tiling_config |= BANK_SWAPS(1); in r600_gpu_init()
2074 tmp = (tiling_config & PIPE_TILING__MASK) >> PIPE_TILING__SHIFT; in r600_gpu_init()
2077 tiling_config |= tmp << 16; in r600_gpu_init()
2080 rdev->config.r600.tile_config = tiling_config; in r600_gpu_init()
2081 WREG32(GB_TILING_CONFIG, tiling_config); in r600_gpu_init()
2082 WREG32(DCP_TILING_CONFIG, tiling_config & 0xffff); in r600_gpu_init()
2083 WREG32(HDP_TILING_CONFIG, tiling_config & 0xffff); in r600_gpu_init()
2084 WREG32(DMA_TILING_CONFIG, tiling_config & 0xffff); in r600_gpu_init()