53 	post_div = RREG32_PLL(RADEON_SCLK_CNTL) & RADEON_SCLK_SRC_SEL_MASK;  in radeon_legacy_get_engine_clock()
399 	tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_engine_clock()
401 	WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_engine_clock()
443 	tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_engine_clock()
460 	WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_engine_clock()
477 			tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_clock_gating()
491 			WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
495 				tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_clock_gating()
514 				WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
551 				tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_clock_gating()
567 				WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
632 				tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_clock_gating()
635 				WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
664 			tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_clock_gating()
682 			WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
737 			tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_clock_gating()
745 			WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
748 			tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_clock_gating()
757 			WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
792 			tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_clock_gating()
801 			WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
837 			tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_clock_gating()
862 			WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()