397 	WREG32_PLL(RADEON_CLK_PIN_CNTL, tmp);  in radeon_legacy_set_engine_clock()
401 	WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_engine_clock()
407 	WREG32_PLL(RADEON_SPLL_CNTL, tmp);  in radeon_legacy_set_engine_clock()
413 	WREG32_PLL(RADEON_SPLL_CNTL, tmp);  in radeon_legacy_set_engine_clock()
420 	WREG32_PLL(RADEON_M_SPLL_REF_FB_DIV, tmp);  in radeon_legacy_set_engine_clock()
429 	WREG32_PLL(RADEON_SPLL_CNTL, tmp);  in radeon_legacy_set_engine_clock()
433 	WREG32_PLL(RADEON_SPLL_CNTL, tmp);  in radeon_legacy_set_engine_clock()
439 	WREG32_PLL(RADEON_SPLL_CNTL, tmp);  in radeon_legacy_set_engine_clock()
460 	WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_engine_clock()
466 	WREG32_PLL(RADEON_CLK_PIN_CNTL, tmp);  in radeon_legacy_set_engine_clock()
491 			WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
514 				WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
519 				WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp);  in radeon_legacy_set_clock_gating()
524 				WREG32_PLL(RADEON_VCLK_ECP_CNTL, tmp);  in radeon_legacy_set_clock_gating()
540 				WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp);  in radeon_legacy_set_clock_gating()
549 				WREG32_PLL(R300_SCLK_CNTL2, tmp);  in radeon_legacy_set_clock_gating()
567 				WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
572 				WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp);  in radeon_legacy_set_clock_gating()
577 				WREG32_PLL(RADEON_VCLK_ECP_CNTL, tmp);  in radeon_legacy_set_clock_gating()
593 				WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp);  in radeon_legacy_set_clock_gating()
598 				WREG32_PLL(RADEON_MCLK_MISC, tmp);  in radeon_legacy_set_clock_gating()
630 				WREG32_PLL(RADEON_MCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
635 				WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
642 				WREG32_PLL(R300_SCLK_CNTL2, tmp);  in radeon_legacy_set_clock_gating()
653 			WREG32_PLL(RADEON_CLK_PWRMGT_CNTL, tmp);  in radeon_legacy_set_clock_gating()
658 			WREG32_PLL(RADEON_CLK_PIN_CNTL, tmp);  in radeon_legacy_set_clock_gating()
682 			WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
698 				WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp);  in radeon_legacy_set_clock_gating()
710 				WREG32_PLL(RADEON_PLL_PWRMGT_CNTL, tmp);  in radeon_legacy_set_clock_gating()
724 			WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp);  in radeon_legacy_set_clock_gating()
731 			WREG32_PLL(RADEON_VCLK_ECP_CNTL, tmp);  in radeon_legacy_set_clock_gating()
745 			WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
757 			WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
761 			WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp);  in radeon_legacy_set_clock_gating()
767 			WREG32_PLL(RADEON_VCLK_ECP_CNTL, tmp);  in radeon_legacy_set_clock_gating()
784 			WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp);  in radeon_legacy_set_clock_gating()
790 			WREG32_PLL(R300_SCLK_CNTL2, tmp);  in radeon_legacy_set_clock_gating()
801 			WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
805 			WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp);  in radeon_legacy_set_clock_gating()
812 			WREG32_PLL(RADEON_MCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
818 			WREG32_PLL(RADEON_VCLK_ECP_CNTL, tmp);  in radeon_legacy_set_clock_gating()
835 			WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp);  in radeon_legacy_set_clock_gating()
862 			WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
872 				WREG32_PLL(R300_SCLK_CNTL2, tmp);  in radeon_legacy_set_clock_gating()
880 				WREG32_PLL(RADEON_MCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
889 				WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp);  in radeon_legacy_set_clock_gating()
902 			WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp);  in radeon_legacy_set_clock_gating()
908 			WREG32_PLL(RADEON_VCLK_ECP_CNTL, tmp);  in radeon_legacy_set_clock_gating()