Lines Matching refs:mclk
169 u32 sclk, mclk; in radeon_set_power_state() local
191 mclk = rdev->pm.power_state[rdev->pm.requested_power_state_index]. in radeon_set_power_state()
192 clock_info[rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx].mclk; in radeon_set_power_state()
194 mclk = rdev->pm.power_state[rdev->pm.requested_power_state_index]. in radeon_set_power_state()
195 clock_info[rdev->pm.requested_clock_mode_index].mclk; in radeon_set_power_state()
197 if (mclk > rdev->pm.default_mclk) in radeon_set_power_state()
198 mclk = rdev->pm.default_mclk; in radeon_set_power_state()
227 if (rdev->asic->pm.set_memory_clock && (mclk != rdev->pm.current_mclk)) { in radeon_set_power_state()
229 radeon_set_memory_clock(rdev, mclk); in radeon_set_power_state()
231 rdev->pm.current_mclk = mclk; in radeon_set_power_state()
232 DRM_DEBUG_DRIVER("Setting: m: %d\n", mclk); in radeon_set_power_state()
338 clock_info->mclk * 10, in radeon_pm_print_states()