361 				struct radeon_ib *ib,  in radeon_vm_set_pages()  argument
370 		radeon_asic_vm_copy_pages(rdev, ib, pe, src, count);  in radeon_vm_set_pages()
373 		radeon_asic_vm_write_pages(rdev, ib, pe, addr,  in radeon_vm_set_pages()
377 		radeon_asic_vm_set_pages(rdev, ib, pe, addr,  in radeon_vm_set_pages()
391 	struct radeon_ib ib;  in radeon_vm_clear_bo()  local
407 	r = radeon_ib_get(rdev, R600_RING_TYPE_DMA_INDEX, &ib, NULL, 256);  in radeon_vm_clear_bo()
411 	ib.length_dw = 0;  in radeon_vm_clear_bo()
413 	radeon_vm_set_pages(rdev, &ib, addr, 0, entries, 0, 0);  in radeon_vm_clear_bo()
414 	radeon_asic_vm_pad_ib(rdev, &ib);  in radeon_vm_clear_bo()
415 	WARN_ON(ib.length_dw > 64);  in radeon_vm_clear_bo()
417 	r = radeon_ib_schedule(rdev, &ib, NULL, false);  in radeon_vm_clear_bo()
421 	ib.fence->is_vm_update = true;  in radeon_vm_clear_bo()
422 	radeon_bo_fence(bo, ib.fence, false);  in radeon_vm_clear_bo()
425 	radeon_ib_free(rdev, &ib);  in radeon_vm_clear_bo()
650 	struct radeon_ib ib;  in radeon_vm_update_page_directory()  local
663 	r = radeon_ib_get(rdev, R600_RING_TYPE_DMA_INDEX, &ib, NULL, ndw * 4);  in radeon_vm_update_page_directory()
666 	ib.length_dw = 0;  in radeon_vm_update_page_directory()
686 				radeon_vm_set_pages(rdev, &ib, last_pde,  in radeon_vm_update_page_directory()
700 		radeon_vm_set_pages(rdev, &ib, last_pde, last_pt, count,  in radeon_vm_update_page_directory()
703 	if (ib.length_dw != 0) {  in radeon_vm_update_page_directory()
704 		radeon_asic_vm_pad_ib(rdev, &ib);  in radeon_vm_update_page_directory()
706 		radeon_sync_resv(rdev, &ib.sync, pd->tbo.resv, true);  in radeon_vm_update_page_directory()
707 		WARN_ON(ib.length_dw > ndw);  in radeon_vm_update_page_directory()
708 		r = radeon_ib_schedule(rdev, &ib, NULL, false);  in radeon_vm_update_page_directory()
710 			radeon_ib_free(rdev, &ib);  in radeon_vm_update_page_directory()
713 		ib.fence->is_vm_update = true;  in radeon_vm_update_page_directory()
714 		radeon_bo_fence(pd, ib.fence, false);  in radeon_vm_update_page_directory()
716 	radeon_ib_free(rdev, &ib);  in radeon_vm_update_page_directory()
734 				struct radeon_ib *ib,  in radeon_vm_frag_ptes()  argument
774 		radeon_vm_set_pages(rdev, ib, pe_start, addr, count,  in radeon_vm_frag_ptes()
782 		radeon_vm_set_pages(rdev, ib, pe_start, addr, count,  in radeon_vm_frag_ptes()
789 	radeon_vm_set_pages(rdev, ib, frag_start, addr, count,  in radeon_vm_frag_ptes()
796 		radeon_vm_set_pages(rdev, ib, frag_end, addr, count,  in radeon_vm_frag_ptes()
817 				 struct radeon_ib *ib,  in radeon_vm_update_ptes()  argument
834 		radeon_sync_resv(rdev, &ib->sync, pt->tbo.resv, true);  in radeon_vm_update_ptes()
850 				radeon_vm_frag_ptes(rdev, ib, last_pte,  in radeon_vm_update_ptes()
867 		radeon_vm_frag_ptes(rdev, ib, last_pte,  in radeon_vm_update_ptes()
918 	struct radeon_ib ib;  in radeon_vm_bo_update()  local
996 	r = radeon_ib_get(rdev, R600_RING_TYPE_DMA_INDEX, &ib, NULL, ndw * 4);  in radeon_vm_bo_update()
999 	ib.length_dw = 0;  in radeon_vm_bo_update()
1005 			radeon_sync_fence(&ib.sync, vm->ids[i].last_id_use);  in radeon_vm_bo_update()
1008 	r = radeon_vm_update_ptes(rdev, vm, &ib, bo_va->it.start,  in radeon_vm_bo_update()
1012 		radeon_ib_free(rdev, &ib);  in radeon_vm_bo_update()
1016 	radeon_asic_vm_pad_ib(rdev, &ib);  in radeon_vm_bo_update()
1017 	WARN_ON(ib.length_dw > ndw);  in radeon_vm_bo_update()
1019 	r = radeon_ib_schedule(rdev, &ib, NULL, false);  in radeon_vm_bo_update()
1021 		radeon_ib_free(rdev, &ib);  in radeon_vm_bo_update()
1024 	ib.fence->is_vm_update = true;  in radeon_vm_bo_update()
1025 	radeon_vm_fence_pts(vm, bo_va->it.start, bo_va->it.last + 1, ib.fence);  in radeon_vm_bo_update()
1027 	bo_va->last_pt_update = radeon_fence_ref(ib.fence);  in radeon_vm_bo_update()
1028 	radeon_ib_free(rdev, &ib);  in radeon_vm_bo_update()