Lines Matching refs:WREG32_MC

518 	WREG32_MC(R_000100_MC_PT0_CNTL, tmp);  in rs600_gart_tlb_flush()
522 WREG32_MC(R_000100_MC_PT0_CNTL, tmp); in rs600_gart_tlb_flush()
526 WREG32_MC(R_000100_MC_PT0_CNTL, tmp); in rs600_gart_tlb_flush()
563 WREG32_MC(R_000100_MC_PT0_CNTL, in rs600_gart_enable()
568 WREG32_MC(R_00016C_MC_PT0_CLIENT0_CNTL + i, in rs600_gart_enable()
579 WREG32_MC(R_000102_MC_PT0_CONTEXT0_CNTL, in rs600_gart_enable()
585 WREG32_MC(R_000102_MC_PT0_CONTEXT0_CNTL + i, 0); in rs600_gart_enable()
588 WREG32_MC(R_00012C_MC_PT0_CONTEXT0_FLAT_BASE_ADDR, in rs600_gart_enable()
590 WREG32_MC(R_00013C_MC_PT0_CONTEXT0_FLAT_START_ADDR, rdev->mc.gtt_start); in rs600_gart_enable()
591 WREG32_MC(R_00014C_MC_PT0_CONTEXT0_FLAT_END_ADDR, rdev->mc.gtt_end); in rs600_gart_enable()
592 WREG32_MC(R_00011C_MC_PT0_CONTEXT0_DEFAULT_READ_ADDR, 0); in rs600_gart_enable()
595 WREG32_MC(R_000112_MC_PT0_SYSTEM_APERTURE_LOW_ADDR, rdev->mc.vram_start); in rs600_gart_enable()
596 WREG32_MC(R_000114_MC_PT0_SYSTEM_APERTURE_HIGH_ADDR, rdev->mc.vram_end); in rs600_gart_enable()
600 WREG32_MC(R_000100_MC_PT0_CNTL, (tmp | S_000100_ENABLE_PT(1))); in rs600_gart_enable()
602 WREG32_MC(R_000009_MC_CNTL1, (tmp | S_000009_ENABLE_PAGE_TABLES(1))); in rs600_gart_enable()
616 WREG32_MC(R_000100_MC_PT0_CNTL, 0); in rs600_gart_disable()
618 WREG32_MC(R_000009_MC_CNTL1, tmp & C_000009_ENABLE_PAGE_TABLES); in rs600_gart_disable()
963 WREG32_MC(R_000005_MC_AGP_LOCATION, 0x0FFFFFFF); in rs600_mc_program()
964 WREG32_MC(R_000006_AGP_BASE, 0); in rs600_mc_program()
965 WREG32_MC(R_000007_AGP_BASE_2, 0); in rs600_mc_program()
967 WREG32_MC(R_000004_MC_FB_LOCATION, in rs600_mc_program()