710 void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *crtc)  in atom_rv515_force_tv_scaler()  argument
712 	int index_reg = 0x6578 + crtc->crtc_offset;  in atom_rv515_force_tv_scaler()
713 	int data_reg = 0x657c + crtc->crtc_offset;  in atom_rv515_force_tv_scaler()
715 	WREG32(0x659C + crtc->crtc_offset, 0x0);  in atom_rv515_force_tv_scaler()
716 	WREG32(0x6594 + crtc->crtc_offset, 0x705);  in atom_rv515_force_tv_scaler()
717 	WREG32(0x65A4 + crtc->crtc_offset, 0x10001);  in atom_rv515_force_tv_scaler()
718 	WREG32(0x65D8 + crtc->crtc_offset, 0x0);  in atom_rv515_force_tv_scaler()
719 	WREG32(0x65B0 + crtc->crtc_offset, 0x0);  in atom_rv515_force_tv_scaler()
720 	WREG32(0x65C0 + crtc->crtc_offset, 0x0);  in atom_rv515_force_tv_scaler()
721 	WREG32(0x65D4 + crtc->crtc_offset, 0x0);  in atom_rv515_force_tv_scaler()
954 					 struct radeon_crtc *crtc,  in rv515_crtc_bandwidth_compute()  argument
958 	struct drm_display_mode *mode = &crtc->base.mode;  in rv515_crtc_bandwidth_compute()
965 	if (!crtc->base.enabled) {  in rv515_crtc_bandwidth_compute()
983 	if (crtc->vsc.full > dfixed_const(2))  in rv515_crtc_bandwidth_compute()
1009 	if (crtc->rmx_type != RMX_OFF) {  in rv515_crtc_bandwidth_compute()
1011 		if (crtc->vsc.full > b.full)  in rv515_crtc_bandwidth_compute()
1012 			b.full = crtc->vsc.full;  in rv515_crtc_bandwidth_compute()
1013 		b.full = dfixed_mul(b, crtc->hsc);  in rv515_crtc_bandwidth_compute()
1029 	a.full = dfixed_const(crtc->base.mode.crtc_htotal);  in rv515_crtc_bandwidth_compute()
1037 	a.full = dfixed_const(crtc->base.mode.crtc_htotal);  in rv515_crtc_bandwidth_compute()
1038 	b.full = dfixed_const(crtc->base.mode.crtc_hdisplay);  in rv515_crtc_bandwidth_compute()
1092 	wm->priority_mark_max.full = dfixed_const(crtc->base.mode.crtc_hdisplay);  in rv515_crtc_bandwidth_compute()
1099 	if (dfixed_trunc(estimated_width) > crtc->base.mode.crtc_hdisplay) {  in rv515_crtc_bandwidth_compute()