182 	rdev->mc.vram_width = 128;  in rv515_vram_get_type()
183 	rdev->mc.vram_is_ddr = true;  in rv515_vram_get_type()
187 		rdev->mc.vram_width = 64;  in rv515_vram_get_type()
190 		rdev->mc.vram_width = 128;  in rv515_vram_get_type()
193 		rdev->mc.vram_width = 128;  in rv515_vram_get_type()
203 	radeon_vram_location(rdev, &rdev->mc, 0);  in rv515_mc_init()
204 	rdev->mc.gtt_base_align = 0;  in rv515_mc_init()
206 		radeon_gtt_location(rdev, &rdev->mc);  in rv515_mc_init()
388 				       upper_32_bits(rdev->mc.vram_start));  in rv515_mc_resume()
390 				       upper_32_bits(rdev->mc.vram_start));  in rv515_mc_resume()
393 				       upper_32_bits(rdev->mc.vram_start));  in rv515_mc_resume()
395 				       upper_32_bits(rdev->mc.vram_start));  in rv515_mc_resume()
399 		       (u32)rdev->mc.vram_start);  in rv515_mc_resume()
401 		       (u32)rdev->mc.vram_start);  in rv515_mc_resume()
403 	WREG32(R_000310_VGA_MEMORY_BASE_ADDRESS, (u32)rdev->mc.vram_start);  in rv515_mc_resume()
479 	WREG32(R_0000F8_CONFIG_MEMSIZE, rdev->mc.real_vram_size);  in rv515_mc_program()
482 			S_000001_MC_FB_START(rdev->mc.vram_start >> 16) |  in rv515_mc_program()
483 			S_000001_MC_FB_TOP(rdev->mc.vram_end >> 16));  in rv515_mc_program()
485 		S_000134_HDP_FB_START(rdev->mc.vram_start >> 16));  in rv515_mc_program()
488 			S_000002_MC_AGP_START(rdev->mc.gtt_start >> 16) |  in rv515_mc_program()
489 			S_000002_MC_AGP_TOP(rdev->mc.gtt_end >> 16));  in rv515_mc_program()
490 		WREG32_MC(R_000003_MC_AGP_BASE, lower_32_bits(rdev->mc.agp_base));  in rv515_mc_program()
492 			S_000004_AGP_BASE_ADDR_2(upper_32_bits(rdev->mc.agp_base)));  in rv515_mc_program()